Optical Module Chip Layout With Irregular Substrate to Cut Area Waste
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Solution Overview
Problem
The rectangular shape of existing optical/electrical chips results in area waste and increased costs due to inefficient use of chip space, limiting the size and application scenarios of optical/electrical modules.
Innovation Solution
The chip design incorporates a substrate with more than four side walls, featuring an abnormal shape to accommodate the transmitter and receiver regions separately, allowing for optimized layout based on their respective areas, reducing the chip's area waste and costs, and integrating an optical/electrical module with reduced size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a rectangular shape is used for the chip substrate, then the manufacturing process is simple and easy to manufacture, but the chip area is wasted and the cost increases
Solution Approach 1:
The patent applies asymmetry by changing the substrate shape from a conventional rectangle to an irregular polygon with 5 or more sides. This asymmetric design allows the chip boundaries to precisely match the rectangular transmitter and receiver regions, eliminating the area waste that occurs with rectangular substrates while remaining manufacturable through standard photolithography and etching processes.
2Device complexity
If a rectangular shape is used for the chip substrate, then the structure is simple, but the chip area increases and the cost increases
Solution Approach 1:
The substrate employs an irregular polygonal shape with 5 or more sides that asymmetrically conforms to the combined footprint of the rectangular transmitter and receiver regions. This reduces the total chip area compared to a bounding rectangle while maintaining structural simplicity through a single continuous polygonal boundary that can be defined by straightforward layout rules.
Solution Approach 2:
The substrate is segmented into distinct functional regions: a first region containing the transmitter and a second region containing the receiver, separated by a side wall. This segmentation allows each region to be optimized independently for its rectangular components while the overall irregular polygonal shape minimizes total area usage.
3Device complexity
If the transmitter and receiver regions are designed to fit a rectangular chip, then the layout is simple, but the area waste increases
Solution Approach 1:
The chip layout is segmented into a first region for the transmitter and a second region for the receiver, with the regions separated by a side wall of the irregular polygonal substrate. Each region maintains a rectangular configuration suitable for standard component placement, while the overall irregular boundary eliminates area waste by precisely matching the combined footprint of these segmented regions.
Data Source
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AI summary
A chip (10), an optical/electrical module, and an optical communication device are provided. The chip (10) includes a substrate (100), and a transmitter (111) and a receiver (112) that are located on a first side of the substrate (100). A quantity of side walls of the substrate (100) is greater than four, the transmitter (111) is located in a first region (1001) of the substrate (100), the receiver (112) is located in a second region (1002) of the substrate (100), the first region (1001) is adjacent to the second region (1002), and a part of the substrate (100) located in the first region (1001) has a first side wall (101) on a side that is of the first region (1001) and that faces the second region (1002), that is, a shape of the substrate (100) is not a rectangle. In addition, a part, of the first region (1001), that is located on a side that is of the first side wall (101) and that is away from the second region (1002) is a protruding part of the first region (1001) relative to the second region (1002), so that the first region (1001) and the second region (1002) form an abnormal-shaped region. The first region (1001) and the second region (1002) may be respectively designed based on an area of the transmitter (111) and an area of the receiver (112), and do not need to adapt to a regular rectangle of the chip (10). This reduces an area of the chip (10) to some extent, reduces an area waste of the chip (10), and reduces costs of the chip (10). This also reduces a size of the optical/electrical module, and expands application scenarios of the optical/electrical module.