Optical Communication Device Clock Switching for Phase Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In digital coherent reception systems for optical communication, achieving synchronization between the clock of the ADC and the data clock is challenging, particularly during start-up and signal loss conditions, leading to potential delays and increased recovery times due to waveform distortion and phase detection difficulties.
Innovation Solution
An optical communication device with a phase detector to generate a phase signal indicating sampling displacement, a clock switch-determiner to switch from a reference clock to a data clock when the phase signal amplitude exceeds a threshold, and a selector to synchronize the internal clock with the reference clock at start-up or signal loss, ensuring proper sampling and phase detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If minimal sampling is performed to reduce hardware complexity, then device complexity is reduced, but sampling accuracy deteriorates leading to phase detection deviations
Solution Approach 1:
The patent implements a feedback mechanism where the phase detector continuously monitors the phase difference between the received signal and the local oscillator, and adjusts the sampling timing accordingly. This feedback loop compensates for the limitations of minimal sampling by dynamically optimizing the sampling moment based on actual signal conditions, thereby maintaining sampling accuracy without requiring increased hardware complexity.
Solution Approach 2:
The patent changes the sampling parameter (sampling timing) based on the phase detection results. By adjusting the sampling moment according to the detected phase difference and using the Gardner phase detector to determine optimal sampling points, the system achieves accurate sampling with minimal hardware resources. The sampling timing is dynamically modified rather than fixed, allowing high precision with low complexity.
2Loss of time
If frequency synchronization is not established at start-up or signal loss, then clock switching is delayed, but recovery time increases
Solution Approach 1:
The patent performs preliminary frequency synchronization at the start-up phase and during signal loss conditions by switching to the reference clock before the actual data transmission begins. This preliminary action ensures that the frequency synchronization is established in advance, avoiding delays during the actual communication and reducing recovery time when signal interruptions occur.
Solution Approach 2:
The patent introduces a reference clock as an intermediary to bridge the frequency synchronization between the local oscillator and the received signal. During start-up or signal loss, the reference clock serves as a stable intermediary that maintains frequency accuracy, allowing the system to recover quickly without waiting for the main synchronization process to complete.
3Measurement precision
If waveform distortion occurs during digital coherent reception, then signal quality deteriorates, but phase detection becomes more difficult
Solution Approach 1:
The patent uses the Gardner phase detector to continuously monitor the phase difference and provides feedback to adjust the sampling timing. This feedback mechanism compensates for waveform distortions by dynamically adapting the sampling moment to the actual signal conditions, thereby maintaining phase detection accuracy even when waveform integrity is compromised.
Solution Approach 2:
The patent makes the sampling timing dynamic rather than fixed, allowing it to adjust in real-time according to the detected phase differences and signal conditions. This dynamic adaptation enables the system to handle waveform distortions effectively, maintaining accurate phase detection by continuously optimizing the sampling moment based on actual signal behavior.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables stable frequency synchronism and reduces recovery time by accurately switching between reference and data clocks, maintaining waveform integrity and facilitating phase detection, thus improving overall system performance.
Implementation Method 1
optical output signals (signals i and q) having a phase difference of 90° therebetween are converted into electrical signals via individual photoelectric converters 103 and 104
Data Source
AI summary
An optical communication device using a digital coherent reception system includes a phase detector configured to generate, based on a signal obtained in a course of digital signal processing, a phase signal indicating a displacement of a sampling of a reception signal, a clock switch-determiner configured to switch from an reference clock to a clock of transferred data when a value of an amplitude of the phase signal exceeds a given threshold value, and a selector configured to synchronize the sampling of the reception signal and an internal clock of the digital signal processing with the reference clock at start time or signal loss time, and synchronize the sampling of the reception signal and the internal clock with the line clock of the reception signal except for the start time and the signal loss time.