Optical Clocked Sample-and-Hold Circuit for Low-Jitter Sampling
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Solution Overview
Problem
Existing track-and-hold circuits have limited bandwidth, switching time, effective resolution, linearity, and are affected by clock jitter, which restricts their performance in converting analog input signals to digital output signals.
Innovation Solution
An optical clock signal source is coupled to the operating point setting unit of the voltage amplifier unit, enabling a high edge steepness and low jitter, with a linear voltage amplifier design and blocking voltage constant circuit to achieve improved bandwidth, linearity, and reduced switching time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an electrical clock signal source is used to control the operating point setting unit, then the circuit operation is stable, but the switching time is long and edge steepness is limited
Solution Approach 1:
The patent replaces the electrical clock signal source with an optical clock signal source (laser) to control the operating point setting unit. The optical signal has inherently faster edge rates and shorter switching times compared to electrical signals, directly resolving the contradiction between switching speed and circuit complexity by using a different physical domain (optical vs electrical).
Solution Approach 2:
The patent changes the fundamental parameter of the clock signal from electrical to optical domain. Optical signals have naturally steeper edges and faster rise/fall times, which directly improves the switching time of the track-and-hold circuit without requiring additional complex circuitry.
2Power
If a high gain voltage amplifier unit is used, then the output signal level is sufficient, but the bandwidth is reduced and linearity deteriorates
Solution Approach 1:
The patent applies preliminary amplification in the optical domain before the electrical signal enters the voltage amplifier unit. The optical clock signal provides the initial drive, allowing the voltage amplifier to operate with lower gain requirements while maintaining sufficient output signal levels, thus preserving linearity and bandwidth.
Solution Approach 2:
The patent introduces an optical signal as an intermediary between the clock source and the voltage amplifier control. This optical intermediary provides clean, high-speed switching control that reduces the burden on the voltage amplifier unit, allowing it to maintain better linearity and bandwidth while still achieving sufficient output levels.
3Adaptability or versatility
If the blocking voltage of the photodiode varies with input signal, then the circuit responds to signal changes, but the pulse shape becomes distorted and bandwidth is reduced
Solution Approach 1:
The patent maintains a constant blocking voltage across the photodiode during operation by using a dedicated bias circuit. This keeps the photodiode operating point stable regardless of input signal variations, ensuring consistent pulse shape and maximum bandwidth while still allowing the photodiode to respond to optical clock signal changes.
Solution Approach 2:
The patent dynamically separates the blocking voltage control from the signal response function. The bias circuit dynamically maintains constant blocking voltage while the photodiode independently responds to optical signal changes, resolving the contradiction between signal responsiveness and pulse shape distortion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a track-and-hold circuit with enhanced accuracy, bandwidth, low clock jitter, and fast switching time, allowing for precise sampling and improved resolution.
Implementation Method 1
The operating point setting unit has, as an electro-optical means, a photodiode PD operated in the reverse direction, which is connected to the control input 7 of the voltage amplifier unit 1 and to a ground connection
Data Source
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AI summary
The invention relates to a follow-hold circuit, for converting an analog input signal into a digital output signal, having a hold capacity unit, having a voltage amplifier unit containing an input, to which an analog input voltage signal can be connected, and containing an output, which is connected to the hold capacity unit, having an operating point adjustment unit for controlling the voltage amplifier unit, wherein a control signal is applied to an input of the operating point adjustment unit, such that, in a follow mode of the follow-hold circuit, an output signal applied to the output of the voltage amplifier unit follows an input signal applied to the input of the voltage amplifier unit, and, in a hold mode of the follow-hold circuit, the output signal of the voltage amplifier unit is constant, having a clock signal source for generating a sequence of clock signals applied to an input of the operating point adjustment unit, wherein the operating point adjustment unit has electrooptical means for generating the control signal, such that the clock signal source is designed as an optical clock signal source, such that an optical impulse sequence having high and low clock signals is applied to the input of the operating point adjustment unit as an optical clock signal source.