Hybrid-Bonded Optical Die Stack for Dense Semiconductor Packaging
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Solution Overview
Problem
The semiconductor industry faces challenges in further reducing the physical size of semiconductor devices and optical devices due to limitations in bonding processes for stacked and bonded semiconductor devices, which hinder miniaturization, higher speed, and lower power consumption.
Innovation Solution
A method of forming hybrid bonded semiconductor devices through dielectric-to-dielectric and metal-to-metal bonding, followed by encapsulation and integration with a carrier substrate, utilizing a redistribution structure and bridge bonding layers for electrical connectivity and thermal management, enabling efficient scaling and integration of multiple semiconductor dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional bonding processes are used for stacked semiconductor devices, then manufacturing simplicity is maintained, but integration density and device miniaturization are limited
Solution Approach 1:
The bonding process is segmented into distinct stages: dielectric-to-dielectric bonding followed by metal-to-metal bonding. This segmentation allows each bonding type to be optimized independently, enabling higher integration density while managing process complexity through structured progression
Solution Approach 2:
The patent transitions from planar bonding to three-dimensional stacked bonding by bonding multiple semiconductor dies vertically. This dimensional change enables significantly higher integration density by utilizing the vertical dimension, overcoming the limitations of traditional two-dimensional device layouts
2Manufacturing precision
If multiple semiconductor dies are bonded together to reduce physical size, then integration density improves, but thermal management becomes more challenging
Solution Approach 1:
Dielectric materials serve as intermediary layers between bonded semiconductor dies, providing thermal pathways that conduct heat away from the stacked devices. These intermediary dielectric layers enable effective thermal management in the three-dimensional stacked configuration while maintaining high integration density
3Reliability
If sophisticated bonding techniques are used to achieve higher performance, then electrical connectivity improves, but manufacturing complexity increases
Solution Approach 1:
Dielectric layers are prepared and patterned with bonding surfaces in advance before the actual semiconductor die bonding process. This preliminary action ensures that when bonding occurs, the electrical connectivity is already optimized, improving reliability while simplifying the main bonding operation by removing complexity from the critical bonding step
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of compact, high-performance semiconductor devices with improved electrical connectivity and thermal management, facilitating higher computing power aggregation without requiring special substrates or pinouts, thus enhancing energy efficiency and integration density.
Implementation Method 1
an optical component of the bridge is aligned to transmit and receive optical signals to and from the first optical device
Implementation Method 2
bonding a first die and a second die to a third die... bonding a bridge to the first die and the second die
Data Source
AI summary
A semiconductor device and method of manufacture are provided. In embodiments the method includes bonding a first die and a second die to a third die, the first die comprising a first optical device and then encapsulating the first die and the second die with an encapsulant. A bridge is bonded to the first die and the second die on an opposite side from the third die, wherein an optical component of the bridge is aligned to transmit and receive optical signals to and from the first optical device.