Optical Die Test Interface With Separate Electrode Voltages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for testing optical communication systems in integrated circuit (IC) chip devices face challenges due to lower yield rates from manufacturing defects, especially as device geometries shrink, and existing wafer probe tests struggle to effectively test electro-optical devices due to difficulties in generating, delivering, and processing optical test signals.
Innovation Solution
The development of an optical die test interface and associated die probe test arrangement that includes mirror structures in the scribe street areas of a wafer, using silicon orientation-dependent wet etch processes for micromachining 45-degree mirrors to deflect optical signals perpendicularly, allowing for wafer-level testing of optical and composite die without consuming valuable die space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate voltage sources are provided for each electrode in the optical die test interface, then beam deflection control precision is improved, but device complexity increases
Solution Approach 1:
The patent divides the voltage control system into separate independent voltage sources for each electrode (first voltage source for first electrode, second voltage source for second electrode). This segmentation allows independent control of beam deflection in different directions, achieving precise two-dimensional beam positioning while maintaining modular device architecture that manages complexity through functional separation.
2Productivity
If wafer-level optical testing is implemented, then productivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent transitions from traditional electrical testing to optical testing, adding a new dimension (optical domain) to the testing process. By using optical beams to interact with the device under test at the wafer level, the system achieves high-productivity testing while the optical interaction provides inherent precision that reduces stringent manufacturing precision requirements compared to electrical methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient testing of high-density, low-power, high-performance optical communication systems by providing lateral access to optical circuits on the die, improving testing capabilities while maintaining die integrity during the singulation process.
Implementation Method 1
an optical deflection mirror located in a scribe street region surrounding the first die for perpendicularly deflecting optical test signals into a lateral plane of the wafer
Data Source
AI summary
An integrated circuit optical die test interface and associated testing method are described for using scribe area optical mirror structures (106) to perform wafer die tests on MEMS optical beam waveguide (112) and optical circuit elements (113) by perpendicularly deflecting optical test signals (122) from the scribe area optical mirror structures (106) into and out of the plane of the integrated circuit die under test (104) and/or production test die (157).


