Optical Disc Reproduction Apparatus Bit Slip Error Correction

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Solution Overview

Problem

Existing optical disc reproduction systems face challenges in maintaining low error rates due to bit slips, especially when reading signals with low levels, which can lead to increased error rates and loss of digital information.

Innovation Solution

A reproducing apparatus and method that generate multiple information bit streams with different timing intervals, subject them to run-length decoding, and select the stream with the fewest errors through error correction and detection, allowing for timely adjustment during bit slips to minimize error propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a PLL circuit is used to reproduce a bit clock signal from the read-out signal, then the bit clock signal can be reproduced, but bit slips occur when the signal level is low, leading to increased error rates

Engineering Contradiction:
Improvebit clock signal reproduction accuracyVSAvoiderror rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent divides the bit stream into multiple segments and generates multiple candidate bit streams by shifting these segments. This segmentation allows the system to handle bit slips by examining multiple possible alignments rather than relying on a single fixed timing, thereby maintaining accuracy when signal levels are low and bit slips occur.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by generating multiple candidate bit streams in advance and storing them in a buffer. When bit slips are detected, the system can quickly switch between pre-generated candidates without waiting for real-time processing, thus reducing error rates while maintaining reproduction accuracy.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the density of digital information recorded on the optical disc is increased, then more information can be stored, but the signal level for short-run-length segments decreases, making it difficult for the PLL circuit to accurately reproduce the bit clock signal

Engineering Contradiction:
Improveinformation densityVSAvoidbit clock signal reproduction accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent segments the bit stream into multiple parts and generates multiple candidate alignments. This segmentation approach allows the system to maintain accurate bit clock reproduction even when signal levels are low due to high information density, by evaluating multiple possible timing alignments rather than relying on a single fixed reference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the timing parameters by generating multiple candidate bit streams with different timing offsets. This parameter variation allows the system to adapt to low signal levels caused by high density recording, selecting the timing that produces the most accurate bit clock signal among the candidates.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If Viterbi decoding is used to correct errors in the bit stream, then some errors can be corrected, but lost bits due to bit slips cannot be recovered, increasing the error rate

Engineering Contradiction:
Improveerror correction capabilityVSAvoidlost bits
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent segments the bit stream and generates multiple candidate alignments, which allows the system to identify and recover from bit slips by examining multiple possible positions. This segmentation approach complements Viterbi decoding by providing a mechanism to recover lost bits that Viterbi alone cannot correct, thereby reducing the overall error rate while maintaining error correction capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates multiple copies of the bit stream with different timing offsets and stores them in a buffer. When bit slips occur, the system can select the appropriate copy that corresponds to the correct timing, thereby recovering lost bits. This copying mechanism works in conjunction with Viterbi decoding to provide comprehensive error correction while recovering information that would otherwise be lost.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS7423949B2Reproducing apparatus and method, and recording and reproducing apparatus
Publication Date: 2008.09.09 JVC KENWOOD CORP
  • US7423949B2 patent drawing
  • US7423949B2 patent drawing
  • US7423949B2 patent drawing

AI summary

A signal of a run-length-limited code is read out from a recording medium. The read-out signal is converted into a reproduced digital signal. A decoder subjects the reproduced digital signal to first decoding different from run length decoding to get a first decoded signal. Information bit streams are generated from the first decoded signal. The information bit streams are different in timing by 1-bit-correpsonding intervals. Run length decoders subject the information bit streams to run length decoding to get run-length-decoded bit streams respectively. Each of the run-length-decoded bit streams undergoes one of error correction and error detection. A decision is made as to which of the run-length-decoded bit streams is the smallest in error number on the basis of results of the one of error correction and error detection. The run-length-decoded bit stream being the smallest in error number is selected and outputted as a likeliest information bit stream.