Optical Disc Encoding Circuit With Header-Corrected EDC

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Solution Overview

Problem

Conventional optical disc encoding systems require high bandwidth due to the need for the EDC generator to read and write entire sectors, making the process inefficient, especially since only 4 bytes of error detection code are generated.

Innovation Solution

An EDC generating circuit that processes main data and header information independently, using a scrambler, header generator, EDC correcting circuit, and encoder to generate and correct error detection codes without reading the entire sector, thereby reducing bandwidth requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the EDC generator reads and writes the entire sector to generate EDC, then the EDC can be generated according to the conventional structure, but the bandwidth requirement becomes excessively large

Engineering Contradiction:

ImproveEDC generation correctnessVSAvoidbandwidth requirement

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent divides the sector data into two separate processing paths: main data (2048 bytes) and header data (12 bytes). The EDC generator processes only these specific portions rather than the entire sector, segmenting the data flow to reduce bandwidth requirements while maintaining EDC generation correctness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent extracts only the necessary data portions (main data and header) from the complete sector for EDC generation. By taking out only the relevant 2060 bytes instead of processing the entire sector, the bandwidth requirement is significantly reduced while the EDC remains accurate.

Inventive Principle:

Principle #2Taking out (Extraction)

2Ease of manufacture

If the EDC generator processes the entire sector, then the conventional encoding structure is maintained, but the processing efficiency decreases

Engineering Contradiction:

Improveencoding structure simplicityVSAvoidprocessing efficiency

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The encoding process is segmented into independent modules: a first EDC generator for main data, a header generator for header information, and an EDC correcting circuit for final EDC generation. This modular segmentation maintains structural simplicity while improving processing efficiency by allowing parallel operations.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary generation of a first EDC based on main data before the final EDC correction step. This preliminary action allows the system to prepare error detection data in advance, improving overall processing efficiency without complicating the encoding structure.

Inventive Principle:

Principle #10Preliminary action

3Adaptability or versatility

If the transmitting interface and header generator are independent, then system modularity is improved, but the bandwidth needed for EDC increases

Engineering Contradiction:

Improvesystem modularityVSAvoidbandwidth for EDC

Core Design Contradiction:

Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent introduces an EDC correcting circuit as an intermediary component that receives both the first EDC from the EDC generator and header information from the independent header generator. This mediator combines the outputs of independent modules efficiently, maintaining modularity while controlling bandwidth usage through selective data processing.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Reliability

If the scrambler reads and writes back the whole sector, then data scrambling is completed, but large bandwidth is consumed

Engineering Contradiction:

Improvedata scrambling completenessVSAvoidbandwidth consumption

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The scrambling process is segmented to operate only on the main data portion (2048 bytes) rather than the entire sector. By dividing the data processing scope, the scrambler maintains complete scrambling of relevant data while consuming less bandwidth.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by having the scrambler process only the necessary main data portion rather than the complete sector. This partial processing achieves sufficient scrambling for error correction purposes while reducing bandwidth consumption.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS8166378B2Encoding circuit and encoding method correcting EDC generated from main data according to header

Publication Date: 2012.04.24 REALTEK SEMICON CORP

AI summary

An encoding circuit is disclosed, which has a memory unit, an EDC generating circuit, a scrambler, a header generator, an EDC correcting circuit, and an encoder. The EDC generating circuit generates a first EDC according to at least one main data. The scrambler generates a scrambled main data according to the main data. The header generator generates a header according to header information. The EDC correcting circuit, corrects the first EDC according to the header to generate a second EDC. The encoder encodes an optical data according to the second EDC and the scrambled main data.