Optical Modulator Driver Circuit With Delayed Common-Mode Cancellation
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Solution Overview
Problem
Existing driving circuits for optical modulators face challenges in suppressing common-mode signals at high frequencies, leading to reduced common-mode rejection ratios and increased signal jitter, which affects high-speed optical communication systems.
Innovation Solution
The driving circuit employs a configuration with multiple differential amplification circuits, including those with and without delay lines, connected in parallel, to ensure phase mismatch of common-mode signals, thereby enhancing the common-mode rejection ratio by canceling out common-mode components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional driving circuit is used, then the circuit structure is simple, but the common-mode rejection ratio deteriorates at high frequencies
Solution Approach 1:
The driving circuit is segmented into multiple differential amplification circuits (first and second types) connected in parallel. Each circuit type has different delay characteristics, creating phase differences in common-mode signals. This segmentation allows the circuit to maintain simplicity while improving common-mode rejection through the combined effect of multiple segments.
Solution Approach 2:
The patent introduces asymmetry by using two types of differential amplification circuits with different delay line configurations. The first circuit includes a delay line while the second does not, creating intentional asymmetry in signal paths. This asymmetry causes common-mode signals to experience different phase shifts, enabling cancellation and improving rejection ratio.
2Speed
If the driving circuit operates at high speed, then the communication rate increases, but signal jitter increases due to poor common-mode suppression
Solution Approach 1:
The patent converts the harmful effect of common-mode signals into a beneficial one. By designing circuits with different delay characteristics, common-mode signals that would normally cause jitter are instead transformed into out-of-phase signals that cancel each other out. The phase differences that could cause interference are converted into a mechanism for suppression, reducing jitter while maintaining high-speed operation.
3Reliability
If a single type of differential amplification circuit is used, then the circuit design is simple, but the phase mismatch of common-mode signals is insufficient for effective cancellation
Solution Approach 1:
Different local regions of the circuit (first and second differential amplification circuits) are given different characteristics. The first circuit includes a delay line while the second does not, creating local quality differences. This allows each part to contribute differently to the overall common-mode rejection, with the combined effect achieving superior cancellation without requiring complex design throughout the entire circuit.
Data Source
AI summary
In an exemplary embodiment, a plurality of differential amplification circuits has: first differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, a delay line, and a current source to supply a current to the differential pair circuit via the delay line; and second differential amplification circuits each including a differential pair circuit to generate the differential signal according to the differential input signal, and a current source to directly supply a current to the differential pair circuit. The first differential amplification circuits and the second differential amplification circuits are mutually connected in parallel between the pair of input-side transmission lines and the pair of output-side transmission lines.