Overlapping Optical and Electrical Interfaces on Package Edge
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Solution Overview
Problem
Legacy package I/O communication implementations face bandwidth bottlenecks due to limited edge space for I/O connections, as existing technologies only allow one interface to bond out of the package, restricting off-package bandwidth and limiting the package's functionality in high-density compute environments.
Innovation Solution
The implementation of both optical and electrical fan-outs on the same edge of a package, with optical interfaces positioned at different heights on the top or side edges and electrical SERDES links at the bottom edge, to increase off-package bandwidth by overlapping connections and minimizing the number of I/O pins and interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If only one interface bonds out of the package, then the package structure remains simple, but the off-package bandwidth is limited
Solution Approach 1:
The patent applies dimensionality change by utilizing the Z-height dimension vertically along the package edge. Optical interfaces are positioned at a first Z-height from the bottom side, while electrical interfaces are positioned at a second Z-height, allowing both interface types to coexist on the same edge without lateral interference. This vertical stacking enables increased off-package bandwidth while maintaining a compact package footprint.
2Quantity of substance
If optical and electrical interfaces are positioned at the same location on the package edge, then the package perimeter remains compact, but the I/O bandwidth is restricted
Solution Approach 1:
The patent resolves this contradiction by transitioning from a two-dimensional lateral arrangement to a three-dimensional vertical arrangement. Optical couplings are positioned at a first Z-height and electrical couplings at a second Z-height along the same package edge, effectively using the vertical dimension to pack more I/O connections into the same lateral footprint, thereby increasing bandwidth without expanding package perimeter.
Solution Approach 2:
The patent implements nesting by positioning optical and electrical interfaces at different vertical levels along the same edge, creating a nested arrangement where multiple interface types are embedded within the same lateral space. This allows the package to accommodate both optical fan-out and electrical SERDES links without requiring additional edge real estate.
3Quantity of substance
If multiple interfaces bond out of the package at the same edge, then the bandwidth increases, but the number of I/O pins and interconnects increases
Solution Approach 1:
The patent reduces I/O pin and interconnect complexity by utilizing vertical stacking at different Z-heights. Optical interfaces at a first Z-height and electrical interfaces at a second Z-height can share the same package edge and substrate routing resources, minimizing the need for separate lateral I/O paths and reducing overall interconnect complexity while maintaining high bandwidth.
Data Source
AI summary
Embodiments herein relate to systems, apparatuses, or processes for improving off-package edge bandwidth by overlapping electrical and optical serialization/deserialization (SERDES) interfaces on an edge of the package. In other implementations, off-package bandwidth for a particular edge of a package may use both an optical fanout and an electrical fanout on the same edge of the package. In embodiments, the optical fanout may use a top surface or side edge of a die and the electrical fanout may use the bottom side edge of the die. Other embodiments may be described and/or claimed.