Optical Encoder Comparator Multiplexing for High Interpolation
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Solution Overview
Problem
Conventional optical encoders require increased power consumption and larger silicon area to achieve high positioning accuracy, especially when higher interpolation factors are needed, leading to decreased detection accuracy due to hysteresis mismatch from multiple comparators.
Innovation Solution
The optical encoder employs a phase shifter circuit and four comparators, with multiplexers and digital circuits to generate and select phase-shifted signals, maintaining low power consumption and silicon area usage even at high interpolation factors, using resistor strings for phase shifting and sine, cosine, arc sine, and arc cosine functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of comparators is increased to achieve higher positioning accuracy, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent divides the comparison task into multiple time slots, with each comparator handling different signal pairs at different times. The phase shifter circuit generates multiple phase-shifted versions of input signals, and multiplexers selectively connect different signal pairs to comparators based on timing control. This temporal segmentation allows 4 comparators to process what would traditionally require more comparators simultaneously, resolving the contradiction between measurement precision and device complexity
Solution Approach 2:
The patent employs periodic switching of multiplexers to sequentially present different signal pairs to the same set of comparators. Control signals periodically enable different comparators for different time intervals, allowing the system to achieve higher positioning accuracy through multiple comparison operations over time while using a limited number of physical comparators. This periodic action resolves the contradiction by trading time for reduced hardware complexity
2Measurement precision
If the number of comparators is increased to achieve higher positioning accuracy, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The patent merges the functionality of multiple comparators into a single set of 4 comparators by using temporal multiplexing. The same comparators are reused across different time slots to perform multiple comparison tasks that would traditionally require more comparators operating simultaneously. This merging approach maintains high positioning accuracy while significantly reducing power consumption compared to using more comparators in parallel
Solution Approach 2:
The periodic switching of multiplexers enables the same comparators to be reused across different time intervals for different signal comparison tasks. This periodic reuse means that fewer comparators need to be active simultaneously, directly reducing total power consumption while maintaining the measurement precision required for high positioning accuracy through sequential processing
3Measurement precision
If the number of comparators is increased to achieve higher positioning accuracy, then measurement precision is improved, but silicon area increases
Solution Approach 1:
The patent segments the comparison operations into different time slots, allowing the same physical comparators to be reused for different signal pairs at different times. This temporal segmentation enables high positioning accuracy to be achieved through multiple sequential comparisons rather than requiring multiple comparators to operate simultaneously, thereby reducing the silicon area required for the comparator array
Solution Approach 2:
The comparators are designed to be universal and multi-functional, handling different signal comparison tasks at different times through control of the multiplexers. Each comparator can process multiple different signal pairs sequentially, making the comparator subsystem more versatile and reducing the total number of comparators needed, which directly reduces silicon area while maintaining high positioning accuracy
4Measurement precision
If more comparators are used for higher interpolation factors, then measurement precision is improved, but hysteresis mismatch increases
Solution Approach 1:
The patent segments the comparison operations so that each comparator handles different signal pairs at different time slots rather than all comparators operating simultaneously with identical characteristics. This segmentation reduces the impact of hysteresis mismatch because not all comparators need to have perfectly matched hysteresis characteristics at the same time, allowing high detection accuracy to be achieved while tolerating variations in comparator hysteresis properties
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for high positioning accuracy with reduced power consumption and silicon area, specifically suitable for high interpolation factors, achieving 70% silicon area savings and 1/16th the current consumption of conventional circuits while maintaining precise position detection.
Implementation Method 1
a phase shifter circuit, a first comparator, a second comparator, a third comparator and a fourth comparator. The phase shifter circuit is configured to receive a first signal, a second signal, a third signal and a fourth signal, and generate 4N phase shifted signals
Implementation Method 2
The first comparator is configured to receive a first pair of phase shifted signals from the phase shifter circuit via N/2 first switches and generate a first comparison signal
Data Source
AI summary
There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.