Optical Encoder Interpolation Circuitry With Reduced Phase Error
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Solution Overview
Problem
Existing optical encoders face challenges with increased noise and inaccuracy due to hysteresis in interpolation circuitry, especially at high interpolation factors, leading to phase errors and complex analog circuitry requirements.
Innovation Solution
A method and system for interpolating optical encoder signals using a single track light detector with pairs of A and A\ data channel light detectors and B and B\ light detectors, generating output ramp signals that are 90 degrees out of phase, and employing a resistor ladder or DAC for reference voltage generation, along with slope detection circuitry to minimize phase errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional interpolation circuitry with many comparators is used, then interpolation factor can be increased, but noise and phase errors increase due to excessive switching and hysteresis
Solution Approach 1:
The patent extracts the essential interpolation function from complex comparator-based circuitry and implements it using a simplified digital approach with a single comparator. The interpolation logic is separated into discrete digital steps (detecting 1/4, 1/2, 3/4 positions) rather than continuous analog comparisons, eliminating the noise and hysteresis problems of traditional designs.
Solution Approach 2:
The patent replaces the mechanical/analog comparator-based interpolation system with a digital signal processing approach. Instead of using multiple analog comparators to detect signal positions, the invention uses digital logic to detect specific signal states (1/4, 1/2, 3/4 positions) and generate corresponding interpolation pulses, thereby eliminating analog noise and hysteresis effects.
2Measurement precision
If more comparators are used in interpolation circuitry, then higher interpolation factors are achieved, but device complexity and hardware requirements increase
Solution Approach 1:
The patent extracts the core interpolation functionality from complex comparator arrays and implements it using minimal digital logic. Instead of requiring multiple comparators to achieve high interpolation factors, the invention uses a single comparator combined with digital detection of specific signal positions (1/4, 1/2, 3/4) to achieve the same or better interpolation performance with dramatically reduced complexity.
Solution Approach 2:
The patent substitutes the complex analog comparator-based system with a digital logic implementation. The interpolation function is achieved through digital state detection and pulse generation rather than through multiple analog comparisons, replacing a complex hardware architecture with a simpler digital control approach.
3Object-affected harmful factors
If hysteresis is added to comparators to reduce noise spikes, then noise immunity improves, but phase errors increase due to hysteresis effects
Solution Approach 1:
The patent replaces the analog comparator with hysteresis with a digital detection system that identifies specific signal positions (1/4, 1/2, 3/4) without relying on hysteresis. By using digital logic to detect when the signal reaches these predetermined positions and generating interpolation pulses accordingly, the system achieves noise immunity without introducing the phase errors that hysteresis causes in analog comparators.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in high-speed and accurate interpolation with reduced hardware requirements, minimizing phase errors and enabling higher spatial resolution while maintaining a compact encoder size, thus overcoming the limitations of prior art.
Implementation Method 1
A light emitter is configured to emit light from the light emitter towards a plurality of photodetectors or photodiodes
Data Source
AI summary
Disclosed are various embodiments of circuitry and methods for generating interpolated signals in an optical encoder. The optical encoder configurations and circuitry disclosed herein permit very high resolution reflective optical encoders in small packages to be provided. Methods of making and using such optical encoders are also disclosed. According to one embodiment, the interpolated signals are generated through the use of signal generation circuitry, peak voltage generation circuitry, reference voltage generation circuitry, slope detection circuitry, and a clocked comparator that is configured to output interpolated output pulses.