Optical Channel FEC Architecture With Selective Low-State Inner Coding
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Solution Overview
Problem
Complex FEC encoders and decoders in optical communication systems consume more power, which is a concern in applications where power reduction is necessary without compromising performance.
Innovation Solution
An optical module with a second FEC encoder having a bit-level trellis representation with fewer than 256 states is used to further code a subset of the first FEC encoded data, reducing power consumption while maintaining performance by implementing low-complexity FEC codes like extended Hamming or convolutional codes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex FEC encoders and decoders are used to achieve greater performance, then data recovery performance is improved, but power consumption increases
Solution Approach 1:
The patent segments the FEC encoding process into two stages: an outer FEC encoder (first encoder) and an inner FEC encoder (second encoder). The outer encoder provides baseline error correction, while the inner encoder selectively strengthens protection for critical data portions. This segmentation allows the system to achieve high reliability without requiring a single complex encoder, thereby reducing overall power consumption while maintaining data recovery performance.
Solution Approach 2:
The patent applies local quality by implementing differential FEC encoding where different portions of data receive different levels of error correction strength. The inner FEC encoder selectively encodes only certain subsets of data with enhanced protection, while other portions rely on the outer encoder. This localized approach optimizes power consumption by avoiding uniform high-complexity encoding across all data, while still ensuring critical data maintains high recovery performance.
2Use of energy by moving object
If low-complexity FEC encoders are used to reduce power consumption, then power usage is reduced, but performance may be degraded
Solution Approach 1:
The patent merges two FEC encoding schemes into a concatenated structure: an outer FEC encoder and an inner FEC encoder. The outer encoder provides broad error correction coverage, while the inner encoder adds targeted protection. This combination allows the system to use simpler, lower-power individual encoders that collectively achieve the reliability of a single complex encoder, thus reducing power consumption while maintaining or improving performance.
Solution Approach 2:
The patent applies partial action by having the inner FEC encoder process only a subset of the data encoded by the outer encoder, rather than re-encoding all data. This selective encoding approach reduces the computational burden and power consumption compared to using a single complex encoder, while still providing enhanced protection for critical data portions to maintain overall system reliability.
Data Source
AI summary
An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 256 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.