Optical Fuse Array for IC Die Identification Recovery
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Solution Overview
Problem
Existing methods for embedding die identification information within integrated circuit dies are vulnerable to damage, making it difficult to recover the information if the die is damaged, especially when electronic circuits are compromised.
Innovation Solution
Incorporating an array of fuse elements visible through the top surface of the integrated circuit die, which can be programmed with data bits defining the die identification during the electrical wafer sort process, allowing for both optical inspection and electrical access to store and retrieve the die identification information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of information
If die identification is stored in non-volatile memory circuit, then information storage capability is improved, but vulnerability to damage increases making information unrecoverable when circuits are compromised
Solution Approach 1:
The patent creates an optical copy of the die identification information by programming fuse elements that are visible through the top surface of the die. Instead of relying solely on electrical memory circuits, the identification data is encoded in the physical state (blown vs. intact) of fuse elements that can be optically inspected. This optical copy serves as a backup that can be read even when electrical circuits are damaged, resolving the contradiction between information storage and recovery reliability.
Solution Approach 2:
The patent replaces the electrical reading mechanism with an optical inspection mechanism. Rather than requiring functional electrical circuits to read the die ID from non-volatile memory, the solution uses optical inspection to read the state of fuse elements through the top surface. This substitution of reading methodology eliminates the vulnerability to electrical circuit damage, addressing the reliability issue while maintaining information storage capability.
2Ease of operation
If fuse array is made visible through top surface for optical inspection, then information accessibility is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the die into distinct functional regions: an active circuit region and an optically accessible fuse array region. By separating the identification storage function from the main circuitry and placing it in a dedicated visible region, the structure becomes more complex in layout but simpler in function. This segmentation allows optical inspection tools to access the fuse array without interfering with circuit operation, resolving the contradiction between ease of information retrieval and manufacturing complexity.
Solution Approach 2:
The patent adds an optical dimension to information retrieval by making the fuse array visible through the top surface of the die. Instead of confining identification storage to subsurface electrical memory, the solution extends the reading capability to the surface plane, allowing optical inspection from above. This dimensional change enables simultaneous circuit operation and identification reading, addressing the ease of operation requirement while managing structural complexity through clever spatial arrangement.
3Loss of information
If die identification is micro-etched in a separate layer, then information storage is achieved, but readability under damage conditions deteriorates
Solution Approach 1:
The patent creates a redundant copy of the die identification information in a different physical medium and location. Instead of relying on a single micro-etched layer that can be damaged, the identification data is also encoded in fuse elements that are visible through the top surface. This optical copy provides an alternative reading path that survives circuit damage, resolving the contradiction between information storage and recovery reliability.
Solution Approach 2:
The patent applies different quality characteristics to different parts of the die: the main circuitry maintains its standard electrical properties while the fuse array region is specifically designed for optical visibility through the top surface. This local differentiation ensures that the identification storage region has the specific quality of optical accessibility, making it resilient to electrical damage while maintaining information storage capability.
Data Source
AI summary
Many integrated circuit die are fabricated on a wafer. Each die includes integrated functional circuitry with an array of fuse elements that are visible to optical inspection. An electrical wafer sort is performed to test the integrated functional circuitry of each die. The array of fuse elements for each die on the wafer are programmed through the electrical wafer sort process with data bits defining a die identification that specifies a location of the die on the wafer. The die is then encapsulated in a package. In the event of package failure, a decapsulation is performed to access the die. Optical inspection of the array of fuse elements is then made to extract the die identification.