Optical Integrated Circuits on Bulk Silicon via Crystal Orientation
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Solution Overview
Problem
The high cost of silicon on insulator (SOI) substrates limits the production of optical integrated circuits, prompting the need for methods to manufacture these circuits on bulk silicon substrates while maintaining good characteristics.
Innovation Solution
The development of optical integrated circuits on bulk silicon substrates involves forming a single crystalline semiconductor material substrate with passive and active elements, including optical waveguides and phase shifters, where the passive elements have fewer crystal defects for low signal loss and the active elements have more defects for high signal transfer speed, utilizing specific crystal orientations and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If optical integrated circuits are manufactured on bulk silicon substrates instead of SOI substrates, then production cost is reduced, but manufacturing precision and signal loss characteristics deteriorate
Solution Approach 1:
The patent applies local quality by creating different crystal orientations in different regions of the semiconductor layer. Specifically, the passive element region is oriented along the <100> direction for low signal loss, while the active element region is oriented along the <110> direction for high-speed operation. This spatial differentiation of material properties allows simultaneous optimization of both signal loss characteristics and manufacturing cost on bulk silicon substrates.
2Loss of energy
If the semiconductor layer is oriented along the <100> crystal direction, then signal loss is reduced, but signal transfer speed decreases
Solution Approach 1:
The patent segments the semiconductor layer into distinct regions with different crystal orientations. The passive element region (optical waveguide) is oriented along <100> to minimize signal loss, while the active element region (phase shifter) is oriented along <110> to maximize signal transfer speed. This segmentation allows each functional region to operate at its optimal performance point without compromising the other.
Solution Approach 2:
Different crystal orientations are assigned to different functional regions: <100> orientation in the passive element region for low signal loss, and <110> orientation in the active element region for high-speed operation. This local optimization of material properties resolves the contradiction between signal loss and transfer speed.
3Speed
If the semiconductor layer is oriented along the <110> crystal direction, then signal transfer speed is increased, but signal loss increases
Solution Approach 1:
The semiconductor layer is segmented into active and passive regions with different crystal orientations. The active element region uses <110> orientation for high-speed signal transfer, while the passive element region uses <100> orientation to minimize signal loss during transmission.
Solution Approach 2:
The patent implements local quality by assigning <110> crystal orientation specifically to the active element region where high-speed operation is critical, while maintaining <100> orientation in the passive element region where low signal loss is paramount. This localized optimization resolves the speed-loss tradeoff.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of optical integrated circuits with reduced production costs and improved performance by optimizing the crystalline structure for both low signal loss and high speed, effectively addressing the limitations of SOI substrates.
Implementation Method 1
The passive element may include an optical waveguide
Implementation Method 2
a first cladding having a refractive index lower than that of the first core and surrounding the first core
Data Source
AI summary
An optical integrated circuit may include a substrate including a single crystalline semiconductor material, a passive element extending in a <100> crystal orientation of the substrate and including the single crystalline semiconductor material, and an active element extending in a <110> crystal orientation of the substrate and including the single crystalline semiconductor material.