Optical Isolator With Faraday Shield Vertical Stacking

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Solution Overview

Problem

Existing electronic isolators face challenges in adding more optical channels due to space and pin utilization constraints, leading to increased package size and footprint, which is undesirable in electronic devices requiring high-voltage and low-voltage interface isolation.

Innovation Solution

The design incorporates LED structures and light-sensitive areas on adjacent substrates with grounded metal portions forming Faraday shields, allowing for efficient optical signal transmission while maintaining electrical isolation and reducing the overall package size through optimized chip layout and shielding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If more optical channels are added to optical couplers to meet complex functionality requirements, then the functionality and versatility are improved, but the package size and footprint increase

Engineering Contradiction:
Improvefunctionality requirementsVSAvoidpackage size and footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a horizontal chip configuration to a vertical stacking architecture, utilizing the third dimension (height/depth) to accommodate multiple optical channels. Multiple isolator chips are stacked vertically with optical coupling between layers, allowing increased channel count without expanding the PCB footprint, thus resolving the contradiction between versatility and footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If more optical channels are added to optical couplers, then the channel count is improved, but the chip space utilization decreases

Engineering Contradiction:
Improvechannel countVSAvoidchip space
Core Design Contradiction:
Quantity of substanceVSArea of moving object

Solution Approach 1:

The invention moves from planar (2D) chip layout to three-dimensional vertical stacking, enabling multiple channels to be packed into a compact volume. By stacking isolator chips vertically and using optical coupling through the isolation barrier, the system achieves high channel count without proportionally increasing chip area, effectively resolving the space utilization contradiction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where multiple isolator chips are stacked vertically, with each chip containing optical components that couple to adjacent chips. This nested arrangement allows multiple functional channels to be contained within a compact vertical stack, maximizing channel density within the available chip space.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If wire bonds are used between chips for data transmission, then the electrical isolation is maintained, but the susceptibility to voltage excursions and noise increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidvoltage excursions and noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the mechanical/electrical wire bond connection system with an optical transmission system. Optical signals transmit data between isolator chips across the isolation barrier without direct electrical contact, maintaining galvanic isolation while eliminating the antenna effect and susceptibility to voltage excursions inherent in wire bonds, thus resolving the contradiction between isolation reliability and noise susceptibility.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables effective bi-directional data transmission across isolation boundaries with reduced package size and noise resistance, addressing the challenge of increasing channel counts in optocouplers without enlarging the footprint.

Implementation Method 1

a first Faraday shield disposed between the light emitter portion and the second isolator chip to block electromagnetic radiation from reaching the light-sensitive area

Methodology Applied
Scientific EffectFaraday shield: Faraday Cage

Implementation Method 2

configured to transmit an optical signal from the light emitter portion to the light-sensitive area

Methodology Applied
Scientific EffectOptical signal transmission: Light

Data Source

PatentUS10276490B2Isolation devices with faraday shields
Publication Date: 2019.04.30 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US10276490B2 patent drawing
  • US10276490B2 patent drawing
  • US10276490B2 patent drawing

AI summary

An isolation device includes a first integrated circuit in electrical communication with first circuitry. The first integrated circuit includes a first light emitter portion to emit a first optical signal based on first electrical signals received at the first integrated circuit from the first circuitry. The isolation device includes a second integrated circuit in electrical communication with second circuitry. The second integrated circuit includes a first light-sensitive area to convert the first optical signal into second electrical signals for communication to the second circuitry. The isolation device includes an isolation material between the first integrated circuit and the second integrated circuit to electrically isolate the first integrated circuit from the second integrated circuit and to pass the first optical signal from the first light emitter portion to the first light-sensitive area. The isolation device includes a first shield to shield the first light emitter portion from electromagnetic radiation.