Optical Transmission Lane ID Error Compensation
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Solution Overview
Problem
Existing optical transmission systems using multi-level modulation face challenges in early detection and compensation of logic inversion and bit swap errors, particularly in systems without polarization multiplex, leading to delayed data recovery and reduced efficiency.
Innovation Solution
An optical transmission apparatus that rearranges data strings into multiple logical lanes, sets a lane ID to identify the starting point, and compensates for bit inversion and lane replacement by identifying lane IDs in received data strings, ensuring data consistency across logical and physical lanes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-level modulation system is adopted to transmit multi-bit information in one symbol time, then frequency use efficiency is improved, but logic inversion and bit swap errors occur more frequently
Solution Approach 1:
The patent applies preliminary action by pre-arranging data strings into multiple logical lanes at the transmitter side and establishing lane ID mapping relationships before transmission. This allows the receiver to proactively identify and compensate for logic inversion and bit swap errors by comparing received lane IDs with expected mappings, rather than detecting errors after they occur. The lane ID mechanism is set up in advance to enable rapid error correction.
Solution Approach 2:
The patent implements feedback by using lane IDs to provide information about the actual arrangement of data lanes during transmission. The receiver uses these lane IDs to detect discrepancies between transmitted and received data arrangements, then feeds back compensation information to correct logic inversion and bit swap errors. This creates a closed-loop error detection and correction system.
2Speed
If data is rearranged into multiple logical lanes for high-speed processing, then processing speed is improved, but lane replacement and bit inversion errors increase
Solution Approach 1:
The patent applies segmentation by dividing the data stream into multiple logical lanes for parallel processing. Each lane is independently processed at high speed, improving overall throughput. The lane ID mechanism segments the error detection and correction process, allowing each lane to be monitored and corrected independently based on its specific lane ID mapping, thereby maintaining reliability despite the increased complexity of multi-lane processing.
Solution Approach 2:
The patent introduces lane ID as an intermediary element that mediates between the transmitted data and received data. The lane ID acts as a reference marker that facilitates the comparison and matching process between original and received data arrangements. This intermediary enables automatic detection and compensation of lane replacement and bit inversion errors without requiring complex direct comparison of all data bits.
3Measurement precision
If lane ID is set in non-scramble area to identify logical lane starting point, then lane identification accuracy is improved, but overhead complexity increases
Solution Approach 1:
The patent extracts the lane identification function from the main data payload by placing lane IDs in the overhead area of the frame structure. This separates the identification function from the data transmission function, allowing lane IDs to be processed independently without affecting the main data stream. The extraction of lane ID information into a dedicated overhead region simplifies the identification process while maintaining a manageable frame structure.
Solution Approach 2:
The patent makes the overhead area serve multiple functions: it carries both traditional frame synchronization and control information, and simultaneously carries lane ID information for logical lane identification. This multi-functionality of the overhead region improves lane identification accuracy without requiring a completely separate identification mechanism, thereby limiting the increase in overall system complexity.
Data Source
AI summary
An optical transmission apparatus including a transmitting OTL processor to rearrange a data string stored in a frame into a plurality of logical lanes, and set a lane ID used to identify in which logical lane a beginning of the data string is arranged among the plurality of logical lanes in a non-scramble area in an overhead of the frame, and a receiving OTL processor to respectively identify the lane IDs included in the data string in the respective physical lanes rearranged, determine a generation state of a bit inversion and a lane replacement for each physical lane, compensate the bit inversion and the lane replacement so that the data string in the respective physical lanes becomes same state as the data string in the respective logical lanes, based on the identified result, and rearrange the compensated data string in the respective logical lanes so as to regenerate the frame.