Optical Modem Line Timing Clock Selector
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Solution Overview
Problem
Conventional optical modem systems require separate transmit and receive clocks, leading to frequency differences between transmit and receive directions, which inhibit optimal performance and increase costs, power consumption, and physical footprint due to the need for unique clock circuitry at each node.
Innovation Solution
The system employs a master/slave relationship between optical modems to maintain zero frequency error by line timing the slave modem from the master, eliminating the need for separate clock circuitry and enabling line timing in asynchronously mapped networks, with a selector choosing between local and recovered clocks based on the modem's role and fault conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate transmit and receive clocks are used at each node, then timing synchronization can be maintained, but frequency differences between transmit and receive directions occur and device complexity increases
Solution Approach 1:
The patent merges the transmit clock and receive clock into a single shared clock at each node. The clock is selectively connected to either the transmitter or receiver through a switch, eliminating the need for separate clock circuitry while maintaining timing synchronization. This reduces device complexity and eliminates frequency differences between transmit and receive directions.
Solution Approach 2:
The patent introduces dynamic clock switching where a switch dynamically connects the shared clock to either the transmitter or receiver based on operational mode. This dynamic allocation allows a single clock to serve multiple functions that previously required separate dedicated clocks, reducing complexity while maintaining synchronization reliability.
2Reliability
If line timing is implemented in bidirectional configuration, then frequency difference between transmit and receive directions is eliminated, but device complexity and cost increase due to additional clock circuitry
Solution Approach 1:
The patent combines multiple clock functions into a single shared clock resource. By using one clock that can be selectively switched between transmit and receive paths, the system achieves frequency synchronization without requiring separate clock circuits for each function, thereby eliminating the complexity and cost penalty of traditional line timing implementation.
Solution Approach 2:
The shared clock serves multiple functions - it can be connected to the transmitter for transmit operations or to the receiver for receive operations. This multi-functional clock replaces what would traditionally require separate dedicated clocks, achieving universal timing support for both transmit and receive directions without additional hardware complexity.
3Reliability
If two clocks are used at each node for bidirectional communication, then timing synchronization is maintained, but power consumption and physical footprint increase
Solution Approach 1:
The patent merges two separate clock circuits into one shared clock, directly reducing the number of active oscillators and associated circuitry. This consolidation reduces power consumption while maintaining timing synchronization through selective switching between transmit and receive paths.
4Reliability
If two clocks are used at each node, then timing synchronization is maintained, but physical footprint increases due to additional clock circuitry
Solution Approach 1:
The patent consolidates two separate clock circuits into a single shared clock implementation. By eliminating redundant clock oscillators and associated support circuitry, the physical footprint of the timing synchronization system is reduced while maintaining full functionality through selective clock switching.
Data Source
AI summary
An optical modem includes client interface circuitry; line interface circuitry configured to interface a client signal with the client interface circuitry and interface a line signal in a transmit direction and a receive direction, wherein the line signal terminates at a second optical modem; and a clock connected to the line interface circuitry, wherein the clock includes a selector configured to select one of a local reference clock and a recovered clock from the receive direction based on whether the optical modem is a master or slave and based on whether there is a fault in the receive direction, wherein the optical modem and the second optical modem form a timing island separate from a timing domain associated with the client signal and a second client signal associated with the second optical modem.