Optical Module Multi-Layer PCB Impedance Matching via Hollow Regions

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Solution Overview

Problem

Multi-layer printed circuit boards used in optical modules face impedance discontinuities due to differences in impedance values between conductors on surface and inner layers, leading to poor signal transmission quality and integrity.

Innovation Solution

The optical module design includes a multi-layer circuit board with hollow regions on the intermediate layer corresponding to data signal line pins, which prevents current backflow through the intermediate layer and enhances impedance matching by allowing current to flow through a reference layer, along with strategically placed connection terminals and vias to improve signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a multi-layer PCB design with conventional via structures is used to trace data signals between different layers, then inter-layer conduction is achieved, but impedance discontinuities occur due to differences in impedance values between conductors on surface and inner layers, deteriorating signal transmission quality

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidimpedance discontinuity points
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The via structure is segmented into multiple parts: a first via connecting the surface layer to the intermediate layer, and a second via connecting the intermediate layer to the reference layer. The intermediate layer acts as an intermediate segment that provides impedance matching, dividing the impedance transition into smaller steps to reduce discontinuities and improve signal transmission quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate layer serves as an intermediary between the surface layer and the reference layer. It provides an intermediate impedance level that mediates the transition between the two layers with different impedance values, reducing the abrupt impedance discontinuity and improving signal integrity during inter-layer transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If current backflow occurs through the intermediate layer in conventional via structures, then inter-layer conduction is simplified, but impedance matching deteriorates and signal transmission quality worsens

Engineering Contradiction:
Improveimpedance matchingVSAvoidcurrent backflow
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The harmful current backflow path through the intermediate layer is extracted and eliminated by designing the via structure to force current to flow through the reference layer instead. The reference layer is positioned and dimensioned to provide the primary return path, removing the intermediate layer from the current backflow pathway and preventing impedance degradation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If conventional via structures are used without considering impedance matching, then manufacturing is simpler, but signal transmission quality and impedance matching deteriorate

Engineering Contradiction:
Improveimpedance controlVSAvoidvia structure complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The via structure implements local quality by providing different impedance characteristics at different segments. The first via segment (surface to intermediate layer) has different dimensional parameters than the second via segment (intermediate to reference layer), allowing each segment to be optimized for its specific impedance requirements while maintaining overall manufacturability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11589458B2Circuit board and optical module
Publication Date: 2023.02.21 LIGENT (SINGAPORE) PTE LTD
  • US11589458B2 patent drawing
  • US11589458B2 patent drawing
  • US11589458B2 patent drawing

AI summary

An optical module, including: a first laser and a first laser chip for driving the first laser; a second laser and a second laser chip for driving the second laser; and a multi-layer circuit board, including a surface layer, a reference layer, and an intermediate layer provided between the surface layer and the reference layer, where a first row of edge connector pins and a second row of edge connector pins are disposed in at least one surface layer; the first row of edge connector pins are disposed to be closer than the second row of edge connector pins to a side edge, of the multi-layer circuit board, that is provided with an edge connector; and a region, of the intermediate layer, that corresponds to a data signal line pin in the second row of edge connector pins is a hollow region.