Optical Module Power Pins Double-Row Edge Connector Delay Circuit
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Solution Overview
Problem
The existing optical modules face issues with stable power supply when inserted into external systems due to the limited space for edge connector pins, leading to intermittent power cycling and potential damage to processors and optical chips, especially when additional optical chips are added, causing power pins to be incorrectly aligned and resulting in power surges.
Innovation Solution
The optical module employs a double-row edge connector configuration with power pins aligned along the same direction and connected via a power supply delay circuit, including a resistor, capacitor, and field-effect transistor, to ensure stable power delivery by delaying the power-on process and avoiding power cycles during insertion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single row of edge connector pins is used, then the device complexity is reduced, but the quantity of power pins is insufficient to provide stable power supply to multiple optical chips and processors
Solution Approach 1:
The edge connector pins are divided into multiple rows (first row, second row, etc.) instead of using a single row. Each row contains power pins that are aligned in the insertion direction. This segmentation allows the optical module to have multiple power pins without increasing the complexity of a single row beyond manageable limits.
Solution Approach 2:
The patent transitions from a single-row configuration to a multi-row configuration by adding the dimension of rows. Power pins are arranged in multiple rows along the insertion direction, effectively increasing the quantity of power pins available while distributing them across different rows to maintain organizational simplicity.
2Reliability
If power pins are aligned in the insertion direction across multiple rows, then the reliability of power supply is improved, but the risk of power surge and power cycling during insertion increases
Solution Approach 1:
Power pins in subsequent rows (second row, third row, etc.) are electrically connected to power pins in previous rows through delay circuits. This preliminary connection ensures that when the module is inserted, power is delivered in a controlled sequence: first row power pins establish connection, then delay circuits gradually enable power to subsequent rows, preventing sudden power surges.
Solution Approach 2:
Delay circuits are introduced as intermediary components between power pins in different rows. These delay circuits (which may include resistors, capacitors, or other timing elements) control the timing of power delivery, ensuring that power reaches subsequent rows only after previous rows are stable, thereby preventing power cycling and surges.
3Adaptability or versatility
If additional optical chips are added to increase functionality, then the adaptability of the optical module is improved, but the space for edge connector pins becomes limited
Solution Approach 1:
Instead of expanding the edge connector horizontally with more pins in a single row, the patent utilizes the vertical dimension by arranging power pins in multiple rows. This allows the optical module to support additional optical chips and processors with corresponding power pins without requiring additional horizontal space on the circuit board edge.
Solution Approach 2:
Multiple power pins across different rows are electrically merged through the delay circuit connections. The first power pin in each row is electrically connected to the corresponding power pin in the previous row, creating a unified power distribution network that efficiently serves multiple optical chips and processors within the same edge connector footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures a stable power supply to processors and optical chips, preventing damage from power surges and ensuring smooth operation by maintaining a consistent power state during the insertion process.
Implementation Method 1
The optical module employs a double-row edge connector configuration with power pins aligned along the same direction and connected via a power supply delay circuit, including a resistor, capacitor, and field-effect transistor, to ensure stable power delivery by delaying the power-on process and avoiding power cycles during insertion.
Data Source
AI summary
This disclosure relates to optical module. In one implementation, the optical module includes a multi-layer circuit board, a first optical chip, a second optical chip, and a processor, wherein a surface layer on a same side of the circuit board comprises a first row of edge connector pins and a second row of edge connector pins; the first row of edge connector pins comprise a first power pin; the second row of edge connector pins comprise a second power pin; the first power pin is connected to the first optical chip; the second power pin connected to the second optical chip and the processor; the first power pin and the second power pin are aligned along a same direction and are arranged at a same position among the first row of edge connector pins and the second row of edge connector pins; and the first power pin is electrically connected to the second power pin. In another implementation, the first power pin and the second power pin is not electrically connected and wherein the circuit board further comprises a power delay circuit between the second power pin and the processor.


