Optical Multichip Package With Stacked SOC Dies for Bandwidth Scaling
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Solution Overview
Problem
Legacy semiconductor packaging faces challenges in scalability and form factor growth due to the use of a single large centralized SOC die and multiple photonics engines in 2-D integration architectures, leading to performance limitations, increased power consumption, and design complexity, especially when scaling bandwidth.
Innovation Solution
The solution involves disaggregating the SOC into multiple SOC dies and co-packaging them with photonic integrated circuits (PICs) using a stacked die structure, allowing for modular bandwidth and form factor scaling through the transition from electrical I/O to photonics I/O and integrated silicon photonics technology, simplifying electrical links and reducing design complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single large centralized SOC die is used in 2-D integration architecture, then device complexity is reduced, but scalability and form factor growth are limited
Solution Approach 1:
The patent segments the single large centralized SOC die into multiple smaller SOC dies arranged in a 3-D stacked architecture. Each SOC die can be independently designed, manufactured, and tested, enabling modular scalability. The segmentation allows the system to grow by adding more SOC dies vertically without increasing the lateral form factor, thus resolving the contradiction between scalability and device complexity.
Solution Approach 2:
The patent transitions from a 2-D integration architecture to a 3-D stacked architecture by arranging multiple SOC dies vertically along the z-axis. This dimensional change enables scalability in the vertical direction while maintaining a compact lateral footprint, effectively resolving the contradiction between scalability and form factor constraints.
2Reliability
If multiple photonics engines are integrated in 2-D architecture, then optical receiver and transmitter capabilities are provided, but power consumption increases
Solution Approach 1:
The patent positions photonics engines in the vertical dimension of the 3-D stacked architecture, placing them in close proximity to their corresponding SOC dies. This vertical integration reduces the transmission distance for optical signals, minimizing signal loss and improving reliability while reducing the power consumption required for optical transmission compared to lateral 2-D arrangements.
3Productivity
If bandwidth is scaled in legacy architecture, then data transmission capacity increases, but form factor growth becomes steep
Solution Approach 1:
The patent enables bandwidth scaling by adding more SOC dies in the vertical dimension rather than expanding laterally. Each additional SOC die contributes to increased bandwidth capacity, and the 3-D stacked architecture allows multiple dies to be integrated within a compact package footprint, thus achieving high bandwidth without steep form factor growth.
4Ease of operation
If electrical I/O is used in legacy architecture, then electrical links are established, but design complexity increases
Solution Approach 1:
The patent replaces electrical I/O interfaces with optical I/O interfaces in the stacked architecture. By using optical photonics engines for inter-die communication, the design eliminates complex electrical signaling, impedance matching, and signal integrity concerns associated with high-speed electrical links, thereby reducing overall design complexity while improving performance.
Data Source
AI summary
Embodiments described herein may be related to apparatuses, processes, and techniques related to disaggregating co-packaged SOC and photonic integrated circuits on an multichip package. The photonic integrated circuits may also be silicon photonics engines. In embodiments, multiple SOCs and photonic integrated circuits may be electrically coupled, respectively, into modules, with multiple modules then incorporated into an MCP using a stacked die structure. Other embodiments may be described and/or claimed.