Optical Semiconductor Package Layout to Prevent Light Noise
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Solution Overview
Problem
Existing optical semiconductor packages with stacked semiconductor chips face challenges in securing high reliability due to issues with light noise and increased size, particularly when two chips are stacked.
Innovation Solution
An optical semiconductor package design featuring a first and second chip with integrated resin portions and strategically positioned electrode terminals, where the second chip's terminals are on the inner surface to prevent light noise and enhance protection, and a method for producing this package that includes forming resin portions to cover side surfaces and connecting terminals through the resin, ensuring reliable electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the second chip is configured with terminals on the outer surface to facilitate electrical connection, then ease of connection is improved, but light noise is generated that affects light receiving or emitting function
Solution Approach 1:
The terminals of the second chip are inverted from the conventional outer surface placement to the inner surface placement. This inversion positions the terminals away from the light incident surface, preventing wiring from reflecting light back to the light receiving portion, thus eliminating light noise while maintaining electrical connection functionality through the resin portion.
2Reliability
If separate resin portions are used for each chip to provide comprehensive protection, then reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The first resin portion and second resin portion are merged into a single integrated resin structure that simultaneously covers and protects both the first chip and second chip. This unified resin portion simplifies the package structure, reduces manufacturing complexity, and maintains comprehensive protection reliability for both stacked chips.
3Ease of manufacture
If wiring is routed on the outer surface for easier electrical connection, then ease of manufacture is improved, but light reflection causes noise that degrades performance
Solution Approach 1:
The wiring routing is inverted from outer surface to inner surface placement. The wiring is embedded within the resin portion on the inner surface side, where it cannot reflect incident light back to the light receiving portion. This maintains manufacturing feasibility while eliminating light reflection noise.
4Ease of operation
If the package structure is expanded to accommodate external wiring connections, then ease of electrical connection is improved, but package size increases
Solution Approach 1:
The electrical connection interface is transitioned from a two-dimensional external surface connection to a three-dimensional embedded connection within the resin portion. The terminals on the inner surface are electrically connected to external circuits through the resin, allowing compact integration without increasing package footprint while maintaining connection functionality.
Data Source
AI summary
An optical semiconductor package includes a first chip, a second chip, a first resin portion formed to cover a side surface of the first chip, a second resin portion formed to cover a side surface of the second chip, a first terminal provided on a first inner surface of the first chip, a second terminal provided on a second inner surface of the second chip, and a first wiring electrically connected to the first terminal, passing through an inside of the first resin portion, and extending from a first inner surface side to a first outer surface side of the first chip in a facing direction in which the first inner surface and the second inner surface face each other. The second chip is an optical element. The first resin portion and the second resin portion are integrally provided or continuously provided via another member.