Optical Link Clock Receiver Circuit Architecture
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Solution Overview
Problem
Existing optical receivers for low power optical signals face challenges in reducing power consumption and surface area, particularly when receiving clock signals with complex data encoding and separate clock channels, which often require high charge levels and large circuit footprints.
Innovation Solution
An optical receiver design featuring a photodiode coupled with a switch and transistors, utilizing a diode-connected transistor for voltage offsetting and a low pass filter with a comparator to control the switch based on a clock duty cycle, allowing for efficient reception of low power optical signals with reduced energy consumption and footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two photodiodes are used to receive optical clock signal as pulses, then the clock signal can be received, but the charge required to charge parasitic capacitances increases and the circuit footprint becomes large
Solution Approach 1:
The patent merges the functions of two separate photodiodes into a single photodiode by using a current mirror circuit. The single photodiode receives the optical clock signal and generates a current that is mirrored to create the differential signal, eliminating the need for a second photodiode while maintaining signal reception capability.
Solution Approach 2:
The single photodiode is made multi-functional by using it to generate both the primary signal and the mirrored signal through the current mirror circuit. This allows one photodiode to perform the work of two, reducing the charge required to charge parasitic capacitances and decreasing circuit footprint.
2Reliability
If two photodiodes are used to receive optical clock signal as pulses, then the clock signal can be received, but the circuit footprint becomes large
Solution Approach 1:
The patent merges the functions of two separate photodiodes into a single photodiode by using a current mirror circuit. The single photodiode receives the optical clock signal and generates a current that is mirrored to create the differential signal, eliminating the need for a second photodiode while maintaining signal reception capability.
Solution Approach 2:
The single photodiode is made multi-functional by using it to generate both the primary signal and the mirrored signal through the current mirror circuit. This allows one photodiode to perform the work of two, reducing the charge required to charge parasitic capacitances and decreasing circuit footprint.
3Reliability
If a separate clock channel is used to transmit clock signal, then timing signal can be received, but power consumption increases
Solution Approach 1:
The patent merges the data signal and clock signal reception into a single photodiode and circuit structure. The optical clock signal is received and processed together with data signals, eliminating the need for a separate dedicated clock reception channel and reducing overall power consumption.
Solution Approach 2:
The single photodiode and associated circuitry are made multi-functional to handle both data signals and clock signals. This universal approach allows the same hardware to perform multiple functions, reducing the total power consumption compared to having separate dedicated channels for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient reception of low power optical signals with reduced power consumption and surface area, effectively addressing the limitations of existing solutions by optimizing the circuit architecture and components to achieve balanced duty cycles and stable signal processing.
Implementation Method 1
Optical reception is based on capturing, using a photosensitive device such as a photodiode, a light signal
Data Source
AI summary
An optical receiver of an optical link having: a photodiode coupled between a detection node and a first supply voltage rail, the photodiode being adapted to receive an optical clock signal including pulses; a switch coupled between the detection node and a second supply voltage rail; and a first transistor coupled by its main conducting nodes between the second supply voltage rail and a first output node and having its control node coupled to the detection node, wherein the switch is controlled based on a voltage at the first output node.