Optical Receiver Frame Synchronization with Dual-Stage Error Detection
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Solution Overview
Problem
In optical communication systems, high error rates in optical fiber transmission links make it time-consuming to establish frame synchronization, leading to discarded data signals and reduced network throughput.
Innovation Solution
An optical receiving apparatus with an optoelectrical converting circuit, pre-stage synchronizing word detecting circuit, FEC decoder, post-stage frame synchronization detecting circuit, and receiver frame synchronization display output circuit, which optoelectrically converts and error-corrects optical signals to establish frame synchronization based on successive synchronizing words with bit errors equal to or smaller than a prescribed value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If frame synchronization is established by detecting error-free synchronizing words in conventional optical receiving apparatus, then synchronization accuracy is improved, but the time required to establish synchronization increases significantly when bit error rates are high
Solution Approach 1:
The synchronizing word detection process is divided into two distinct stages: a first stage that detects synchronizing words with a relaxed bit error threshold (first allowable value) to quickly establish preliminary synchronization, and a second stage that detects synchronizing words with a stricter bit error threshold (second allowable value) to confirm accurate synchronization. This segmentation allows the system to balance speed and accuracy by performing different levels of detection at different times.
Solution Approach 2:
The system performs preliminary synchronizing word detection using a first allowable bit error value before performing the final detection with a second allowable bit error value. This preliminary action enables the system to quickly identify potential synchronizing words even when transmission errors are present, reducing the time to establish initial synchronization while maintaining the option to verify accuracy in subsequent steps.
2Reliability
If the synchronizing word detection requires zero bit errors, then synchronization reliability is improved, but data signal throughput decreases due to discarded signals during error-prone transmission
Solution Approach 1:
The system applies partial action by allowing a certain number of bit errors (first allowable value) in synchronizing word detection during the first stage, rather than requiring complete error-free detection. This partial tolerance enables the system to maintain synchronization even when some bit errors occur during transmission, thereby preventing data signal discard and maintaining throughput while still ensuring eventual reliable synchronization through the second detection stage.
3Reliability
If multiple successive error-free synchronizing words are required for synchronization establishment, then false synchronization is reduced, but the complexity of the detection process increases
Solution Approach 1:
The detection process is segmented into two stages with different reliability requirements. The first stage uses a simpler detection criterion (first allowable bit error value) to quickly identify potential synchronizing words, while the second stage applies a stricter criterion (second allowable bit error value) to confirm accurate synchronization. This segmentation reduces overall complexity by avoiding the need for a single complex detection process that must simultaneously handle both quick identification and accurate verification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Facilitates quick activation and resumption of frame synchronization even with many bit errors, ensuring efficient data signal output and reducing erroneous synchronization.
Implementation Method 1
an optoelectrical converting circuit which receives an optical signal and optoelectrically converts the optical signal to reproduce an error-correcting-code-added electric signal
Data Source
AI summary
An optical receiving apparatus with frame synchronization technology which makes it easy to activate a frame synchronization established state even if bit errors are produced over a transmission link. The apparatus includes: an optoelectrical converting circuit; a pre-stage synchronizing word detecting circuit; a decoder; a post-stage frame synchronization detecting circuit; and a receiver frame synchronization display output circuit.