Optical Semiconductor Device Bonding Flatness
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Solution Overview
Problem
The existing techniques for manufacturing optical semiconductor devices face challenges in achieving high bond strength and accurate alignment of waveguide mesas due to poor flatness of the bonding surface, which affects the efficiency of optical coupling between the chip and the silicon wafer.
Innovation Solution
A method involving the formation of compound semiconductor layers with a sacrificial layer, an absorption layer, and a core layer, followed by the creation of a first mesa and an embedding layer, where the sacrificial layer is etched to form a chip that is bonded to a silicon substrate with a waveguide, and a second mesa is formed adjacent to the first mesa for optical coupling, improving flatness and accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a resist is disposed on the chip to protect the bonding surface, then the bond strength is improved, but the flatness of the bonding surface deteriorates due to resist extension to the lower surface
Solution Approach 1:
The patent segments the chip structure by introducing an embedding layer that is selectively etched away, separating the protective function from the bonding surface. The embedding layer is removed in a specific region to create a flat bonding surface while maintaining structural integrity elsewhere, thus resolving the conflict between protection and flatness.
Solution Approach 2:
The patent extracts the embedding layer material from the chip structure after it has served its protective and structural purpose. By selectively removing the embedding layer, the patent achieves a flat bonding surface without the need for resist materials that would compromise flatness, thereby resolving the contradiction between bond strength and surface flatness.
2Manufacturing precision
If the bonding surface is flattened to improve flatness, then the accuracy of waveguide mesa formation is improved, but the structural support and protection are reduced
Solution Approach 1:
The patent segments the chip into distinct functional regions: an embedding layer that provides structural support and protection, and a flat bonding surface region that enables accurate waveguide mesa formation. The embedding layer is selectively etched to create this segmentation, allowing both structural integrity and manufacturing precision to coexist.
Solution Approach 2:
The embedding layer acts as an intermediary structure that provides both mechanical support and a platform for creating the flat bonding surface. It mediates between the need for structural strength and the need for surface flatness, enabling accurate waveguide mesa formation while maintaining chip integrity during processing.
3Reliability
If additional encapsulation layers are added to protect the chip, then the reliability is improved, but the device complexity and manufacturing steps increase
Solution Approach 1:
Instead of adding encapsulation layers, the patent extracts the embedding layer material and uses it as a sacrificial element. This approach eliminates the need for separate encapsulation layers while still providing protection during processing, thereby reducing device complexity and manufacturing steps while maintaining reliability.
Solution Approach 2:
The embedding layer serves multiple functions: it provides structural support during chip fabrication, protects the bonding surface, and acts as a sacrificial element that is selectively removed to create the flat bonding surface. This multi-functionality eliminates the need for separate encapsulation layers, reducing device complexity while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the flatness of the bonding surface, allows for high-accuracy formation of the second mesa, and improves optical coupling efficiency by eliminating the need for additional encapsulation layers, thereby increasing the reliability and efficiency of the optical semiconductor device.
Implementation Method 1
after the step of forming the embedding layer, etching the sacrificial layer to form a chip including the plurality of compound semiconductor layers and the embedding layer
Implementation Method 2
bonding the chip to a substrate containing silicon and having a waveguide
Implementation Method 3
The second mesa includes the core layer and is optically coupled to the waveguide of the substrate
Data Source
AI summary
A method for manufacturing an optical semiconductor device, includes the steps of: forming a plurality of compound semiconductor layers including a sacrificial layer, an absorption layer, and a core layer; forming a first mesa from the plurality of compound semiconductor layers; forming an embedding layer that is a semiconductor layer having the first mesa embedded therein; after the step of forming the embedding layer, etching the sacrificial layer to form a chip including the plurality of compound semiconductor layers and the embedding layer; bonding the chip to a substrate comprising silicon and having a waveguide; and etching a portion of the first mesa of the chip bonded to the substrate to form a second mesa adjacent to the first mesa. The second mesa includes the core layer and is optically coupled to the waveguide of the substrate.