Integrated Optical Semiconductor Device Leakage Current Reduction

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Solution Overview

Problem

Integrated optical semiconductor devices face challenges in reducing substrate leakage current, which is comparable to dark current levels, due to the large area of n-type semiconductor layers on semi-insulating substrates, affecting device performance and characteristics.

Innovation Solution

The implementation of a design where the second conductive layer is electrically isolated from the first conductive layer by a gap, reducing substrate leakage current by limiting the area of the second conductive layer and using a semi-insulating semiconductor substrate with a large electric resistance, and incorporating a seed conductive layer and gold plating for improved electrical insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the area of the n-type semiconductor layer is increased to maintain device functionality, then the light receiving area is improved, but the substrate leakage current increases

Engineering Contradiction:
Improvelight receiving areaVSAvoidsubstrate leakage current
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The back surface conductive layer is segmented into a first region and a second region, with the first region positioned under the n-type semiconductor layer and the second region positioned away from it. This segmentation isolates the leakage current path to a specific region, preventing it from affecting the entire device area and thus maintaining light receiving performance while reducing overall leakage current impact.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A gap is introduced as an intermediary barrier between the first conductive layer (under the n-type layer) and the second conductive layer (away from the n-type layer). This gap acts as an electrical insulation that prevents direct current flow between the two conductive layers through the substrate, thereby reducing substrate leakage current while allowing the n-type layer to maintain its full area for light receiving.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the thickness of the semiconductor layer is reduced to improve epitaxial growth control, then the manufacturing precision is improved, but the device function may be compromised

Engineering Contradiction:
Improvethickness control precisionVSAvoiddevice function
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The n-type semiconductor layer serves multiple functions simultaneously: it acts as the lower cladding layer for the photodiode structure and as the first cladding layer for the optical waveguide. By making this layer multi-functional, the patent eliminates the need for separate cladding layers, thereby reducing the total number of layers and maintaining device functionality even when individual layer thicknesses are reduced for better epitaxial control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If the n-type semiconductor layer is used as both photodiode cladding and waveguide cladding, then the device integration is improved, but the optical coupling precision becomes more difficult to control

Engineering Contradiction:
Improvedevice integrationVSAvoidoptical coupling precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The n-type semiconductor layer is grown in advance during the epitaxial process to serve as the common cladding layer for both the photodiode and optical waveguide before the core layers are formed. This preliminary formation of the cladding layer establishes a uniform base structure that simplifies subsequent optical coupling alignment, as the interface between the waveguide core and the photodiode cladding is pre-established during growth rather than requiring post-fabrication alignment.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces substrate leakage current, improving the light receiving characteristics and stability of photodiodes, and maintaining desired high-frequency characteristics in integrated optical semiconductor devices.

Implementation Method 1

using a semi-insulating semiconductor substrate with a large electric resistance

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

incorporating a seed conductive layer and gold plating for improved electrical insulation

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS9366835B2Integrated optical semiconductor device and integrated optical semiconductor device assembly
Publication Date: 2016.06.14 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US9366835B2 patent drawing
  • US9366835B2 patent drawing
  • US9366835B2 patent drawing

AI summary

An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving devices include the same n-type semiconductor layer disposed on a principal surface of the substrate.