Optical Semiconductor Mesa Structure for Peeling Prevention

Solution Overview

Problem

In hybrid integration technology for optical semiconductor elements, the limitation of compound semiconductor wafer diameter restricts the size of active elements on silicon wafers, leading to significant loss of compound semiconductor material and potential peeling issues due to wet etching, especially when small pieces are jointed to the silicon wafer.

Innovation Solution

The method involves stacking compound semiconductor layers on a substrate, dividing it into small pieces, forming terraces, grooves, and walls on a silicon substrate, and jointing these pieces while creating a second mesa opposite to the first, with grooves and walls arranged to prevent etchant entry and peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of substance

If the compound semiconductor wafer is divided into small pieces to reduce material loss, then the loss of compound semiconductor is reduced, but the junction strength is lowered and peeling may occur

Engineering Contradiction:

Improvecompound semiconductor lossVSAvoidjunction strength

Core Design Contradiction:

Loss of substanceVSStrength

Solution Approach 1:

The compound semiconductor wafer is divided into multiple small pieces, each containing an active element. This segmentation allows efficient use of the limited wafer area while maintaining functional integrity of each piece through proper structural design with mesas and connection portions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Connection portions are formed on the compound semiconductor layers before wafer division. These pre-formed connection portions extend toward the edges and provide built-in reinforcement that prevents peeling during subsequent processing and assembly operations

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If the silicon wafer and compound semiconductor wafer have the same diameter, then the wafer junction can be performed, but the compound semiconductor wafer diameter is limited and the region for forming active elements is small

Engineering Contradiction:

Improvewafer junction feasibilityVSAvoidregion for forming active element

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The compound semiconductor wafer is divided into multiple small pieces, each containing an active element. This segmentation allows efficient use of the limited wafer area while maintaining functional integrity of each piece through proper structural design with mesas and connection portions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention transitions from a two-dimensional planar junction to a three-dimensional structure with mesas and connection portions extending in multiple directions. This dimensional change allows better utilization of the limited wafer area while maintaining junction strength

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If wet etching is used to remove the compound semiconductor substrate, then the stack structure is exposed, but the etchant enters trenches and etches the compound semiconductor layer, causing peeling

Engineering Contradiction:

Improvestack structure exposureVSAvoidcompound semiconductor layer integrity

Core Design Contradiction:

Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

Connection portions are formed on the compound semiconductor layers before wafer division. These pre-formed connection portions extend toward the edges and provide built-in reinforcement that prevents peeling during subsequent processing and assembly operations

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The connection portions act as a cushioning structure that absorbs the harmful effect of etchant penetration. By providing this protective structure in advance, the invention prevents the etchant from reaching and damaging the critical compound semiconductor layers at the junction interface

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively suppresses the peeling of small pieces and reduces compound semiconductor loss by preventing etchant entry, thereby stabilizing the optical semiconductor element and enhancing its operational characteristics.

Implementation Method 1

the walls suppress the entering of an etchant from each groove

Methodology Applied

Scientific EffectPhysical barrier: Physical Containment

Implementation Method 2

wet-etching the first substrate so as to expose the compound semiconductor layers

Methodology Applied

Scientific EffectWet etching:

Data Source

PatentUS11056341B2Optical semiconductor element and method of manufacturing the same

Publication Date: 2021.07.06 SUMITOMO ELECTRIC INDUSTRIES LTD

AI summary

A method of manufacturing an optical semiconductor element includes: stacking a plurality of compound semiconductor layers on a first substrate containing a compound semiconductor; dividing the first substrate into small pieces; forming terraces, grooves, walls, and a first mesa for a waveguide on a second substrate containing silicon; jointing at least one small piece to the second substrate after the forming; wet-etching the first substrate so as to expose the compound semiconductor layers after the jointing; and forming a second mesa opposite to the first mesa from the compound semiconductor layers; wherein the grooves are formed on both sides of the first mesa, the terraces are formed on both sides of the first mesa and the grooves, and the walls are arranged in an extending direction of each groove.