Optical Sensor Semiconductor Passivation for Etch Protection
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Solution Overview
Problem
The formation of semiconductor layers for infrared and visible ray sensing thin film transistors in liquid crystal displays often results in damage, short circuits, and disconnections due to the dry etch processes, as well as interface oxidation and etch stopper corrosion, which complicates the manufacturing of optical sensors with touch and image sensing functions.
Innovation Solution
The implementation of semiconductor passivation layers to enclose the upper and side surfaces of the semiconductor layers, along with the use of insulating layers and etch stoppers, to protect the layers from damage during the etch processes and prevent interface oxidation, thereby ensuring the integrity of the source and drain electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If two dry etch processes are executed to form semiconductor layers of different materials, then the optical sensor can achieve touch sensing and image sensing functions, but the semiconductor layers may be damaged during the etching process
Solution Approach 1:
The patent applies preliminary action by forming a protective insulating layer on the substrate before depositing the semiconductor layers. This insulating layer is prepared in advance to prevent damage to previously formed semiconductor layers during subsequent etching processes, thereby resolving the contradiction between achieving multi-functionality and maintaining layer integrity.
Solution Approach 2:
The patent introduces an insulating layer as an intermediary between the substrate and semiconductor layers, and between different semiconductor layers. This intermediary layer acts as a protective barrier during etching processes, preventing direct damage to the semiconductor layers while allowing the etch process to proceed for forming the desired sensing functions.
2Reliability
If an insulating layer is formed under the semiconductor layer, then the semiconductor layer can be protected, but a large step is generated causing short circuit or disconnection
Solution Approach 1:
The patent applies local quality by forming the insulating layer selectively in specific regions where protection is needed, rather than uniformly across the entire substrate. This localized approach provides protection where required while minimizing the generation of large steps that would cause short circuits or disconnections, thereby balancing protection needs with surface flatness requirements.
3Reliability
If an etch stopper is formed on the semiconductor layer, then the semiconductor layer can be protected during etching, but the etch stopper is corroded by chlorine-based gas causing deterioration
Solution Approach 1:
The patent employs a disposable protective layer strategy where a sacrificial layer is formed temporarily during the manufacturing process to protect the semiconductor layer during etching. This sacrificial layer is designed to be removed after serving its protective function, avoiding the problem of corrosion that would affect permanent etch stoppers made of chlorine-based materials.
Solution Approach 2:
The patent uses composite material structures combining multiple layers with different properties. The protective structure consists of combined insulating layers and semiconductor layers with complementary characteristics, where each layer contributes specific protective functions without suffering from the corrosion issues of single-material etch stoppers.
Data Source
AI summary
An optical sensor preventing damage to a semiconductor layer, and preventing a disconnection and a short circuit of a source electrode and a drain electrode, and a manufacturing method of the optical sensor is provided. The optical sensor includes: a substrate; an infrared ray sensing thin film transistor including a first semiconductor layer disposed on the substrate; a visible ray sensing thin film transistor including a second semiconductor layer disposed on the substrate; a switching thin film transistor including a third semiconductor layer disposed on the substrate; and a semiconductor passivation layer enclosing an upper surface and a side surface of an end portion of at least one of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.