Optical Sequence Identification via XNOR Logic Gates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Optical networks face security challenges due to the complexity and energy consumption of electronic firewalls, which hinder efficient intrusion detection and data protection, especially with the emergence of new network intrusion methods that can cause significant data leakage or errors.
Innovation Solution
The method involves performing an XNOR operation on an optical binary sequence and an all-zero sequence to generate candidate sequence sets, configuring delay durations, and performing an AND operation to identify the target sequence directly in the optical domain, thereby avoiding repeated conversions and enhancing detection efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electronic firewalls are used for optical network security, then signal filtering capability is improved, but device complexity and energy consumption increase
Solution Approach 1:
The patent replaces electronic firewalls with all-optical logic gate circuits (XNOR gates, AND gates, delay circuits) that operate directly on optical signals. This substitution eliminates the need for optical-to-electrical conversion and back, reducing system complexity while maintaining signal filtering capability through purely optical processing.
Solution Approach 2:
The patent introduces all-optical logic gates as intermediary components that process optical signals directly without conversion to electrical domain. These logic gates serve as mediators between the optical signal source and the filtering objective, enabling secure signal processing while avoiding the complexity of electronic firewall architectures.
2Productivity
If optical-to-electrical and electrical-to-optical conversions are performed, then signal processing capability is improved, but time delay increases
Solution Approach 1:
The patent substitutes conversion processes with direct optical processing using all-optical logic gates. By replacing the mechanical/electrical conversion system with an all-optical system, signal processing capability is maintained while eliminating the time delays inherent in optical-to-electrical and electrical-to-optical conversions.
Solution Approach 2:
The patent ensures continuous optical signal processing through the entire filtering chain without interruption for conversion. The optical signal flows continuously through XNOR gates, delay circuits, and AND gates, maintaining uninterrupted useful action and eliminating conversion-related time delays.
3Measurement precision
If multiple conversions are performed for security filtering, then detection accuracy is improved, but energy consumption increases
Solution Approach 1:
The patent replaces energy-intensive conversion processes with low-power all-optical logic operations. The all-optical logic gates (XNOR, AND) and delay circuits consume significantly less energy than electronic firewall systems while maintaining detection accuracy through precise optical signal processing and pattern matching.
Solution Approach 2:
The optical signal processing system performs self-service by directly processing optical signals without requiring conversion to electrical domain. The all-optical logic gates inherently perform the filtering and detection functions that would otherwise require multiple energy-consuming conversion cycles, achieving the same detection accuracy with reduced energy consumption.
Data Source
AI summary
Disclosed is a method and device for target sequence identification, wherein an optical binary sequence and an all-zero sequence are subjected to an XNOR operation and a first candidate sequence set is generated by splitting the result sequence; a second candidate sequence set is generated by splitting the optical binary sequence; multiple binary sequences are selected from the first candidate sequence set and the second candidate sequence set according to the target sequence to generate a to-be-delayed sequence set; various delay duration are configured for each binary sequence of the to-be-delayed sequence set; a to-be-matched sequence set is generated after delaying; an AND operation is performed on the sequences of the to-be-matched sequence set to generate a final sequence; and the number and position of the target sequence in the binary sequence can be determined according to the number and position of a pulse in the final sequence.