Two-Stage Optical Switch Fabric for HPC Scalability
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Solution Overview
Problem
Existing optical switch fabrics for Terabit Ethernet (TE) based High-Performance Computing Networks (HPCNs) face challenges such as limited scalability, high power loss, and increased costs due to the need for optical amplifiers and custom-made AWGs, as well as inefficiencies under unbalanced traffic loads.
Innovation Solution
The proposed optical switch fabrics, named AS and SA, utilize a two-stage architecture with K N×N AWGs and N K×K OSSes, operating in a TDM mode without the need for electronic schedulers or wavelength converters. This design reduces signal power loss, eliminates the requirement for optical amplifiers, and allows for the use of commercially available AWGs, enhancing scalability and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a three-stage ASA switch fabric is used to extend port count, then scalability is improved, but signal power loss increases and optical amplifiers are required
Solution Approach 1:
The switch fabric is divided into multiple stages with AWGs at the edges and OSSes in the middle. This segmentation allows light to pass through fewer components (only one AWG and one OSS) compared to the three-stage ASA architecture, reducing cumulative signal loss while maintaining scalability to support thousands of ports.
Solution Approach 2:
The patent transitions from the conventional three-stage ASA architecture to a two-stage architecture that reorganizes the switching paths. By changing the dimensional arrangement of switching stages and using TDM mode in OSSes, the system achieves better signal loss characteristics while maintaining the required port scalability.
2Adaptability or versatility
If custom-made AWGs are used to meet specific port count requirements, then scalability is improved, but manufacturing cost increases
Solution Approach 1:
The system uses commercially available AWGs with standard port counts (e.g., 8x8, 16x16) in combination with TDM-mode OSSes to achieve scalable port counts. The OSSes act as universal intermediaries that can work with any standard AWG configuration, eliminating the need for custom-made AWGs while maintaining flexibility to support thousands of ports through modular deployment.
3Ease of operation
If electronic schedulers are used to control OSS configuration, then switching control is improved, but device complexity and cost increase
Solution Approach 1:
The OSSes operate autonomously in TDM mode with pre-configured connection patterns stored in their memories. The system self-organizes the switching fabric without requiring external electronic schedulers to configure each OSS. This self-service approach simplifies the control architecture while maintaining full switching control capability through the inherent TDM switching mechanism.
4Loss of energy
If optical amplifiers are added to compensate for signal loss, then signal power is improved, but system cost and complexity increase
Solution Approach 1:
The patent extracts and eliminates the need for optical amplifiers by redesigning the switch fabric architecture to minimize signal loss pathways. By reducing the number of components light must pass through and optimizing the two-stage configuration, the system achieves acceptable signal power levels without requiring additional optical amplifiers, thereby simplifying the overall system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The AS and SA switch fabrics achieve low signal power loss, support thousands of TE links, and reduce implementation costs by eliminating the need for optical amplifiers and custom-made AWGs, while maintaining high scalability and efficiency even under unbalanced traffic loads.
Implementation Method 1
An N×N (N inputs and N outputs) AWG (also known as AWGR) is an ideal device for this task. It is a passive device consuming little or no power. Each input of the device can transmit N different wavelengths simultaneously, which are routed to N outputs without blocking.
Implementation Method 2
An N×N (N inputs and N outputs) AWG (also known as AWGR) is an ideal device for this task. It is a passive device consuming little or no power. Each input of the device can transmit N different wavelengths simultaneously, which are routed to N outputs without blocking.
Implementation Method 3
Optical switch fabrics for high performance computing that can switch WDM (Wavelength Division Multiplexed) packets simultaneously without the need for wavelength converters or optical amplifiers
Data Source
AI summary
This invention is related to two-stage optical packet switch fabrics for TE (terabit Ethernet)-based HPCNs (high performance computing networks). The main features of the invented optical switch architecture are the following: (1) it can support thousands of TE links; (2) it has a low signal power loss and requires no optical amplifiers; (3) it can switch WDM packets simultaneously without using wavelength converters.The patent application presents various embodiments of the two-stage switch architecture. In one embodiment, the first stage comprises K N×N (N inputs and N outputs) AWGs and the second stage comprises N K×K OSSes (optical space switches). This results in a port count of KN. Each input can transmit N wavelengths and a total of KN2 packets can pass through the switch fabric simultaneously without blocking. The switch fabric is named AS for the technologies used in the two stages. Currently 32×32 AWGs are available. This allows an AS switch fabric to support more than a couple of thousands TE links easily.In another embodiment, the first stage comprises N K×K OSSes and the second stage comprises K N×N AWGs. It is named SA for the same reason given above. Similar to the first embodiment, the total number of source and destination ports supported by an SA switch fabric equals KN, and KN2 packets can be transmitted simultaneously through the switch fabric. All the features and advantages of the AS architecture are inherited by the SA architecture.In still another embodiment, two AS or SA switch fabrics are used in parallel to construct a switching system capable of handling any kind of unbalanced traffic loads. A port processor for keeping a bounded delay, for processing and re-sequencing packets in such a switching system is also presented in this patent application.