Optical Module Switch Device SERDES Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As the speed of optical modules in optical module switch devices increases, power consumption rises due to signal distortion and the need for retimer functions to correct waveform deterioration.

Innovation Solution

The optical module switch device incorporates a configuration with SERDES_H and SERDES_L converters having different transmission rates, coupled by a switch circuit, to minimize signal line lengths and reduce power consumption by simplifying distortion correction circuits and turning off retimer functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the speed of optical modules is increased, then transmission efficiency is improved, but power consumption increases due to signal distortion and retimer functions

Engineering Contradiction:
Improvetransmission rateVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent divides the signal transmission path into multiple segments with different transmission rates. High-speed optical modules (100 Gb/s) are connected to intermediate SERDES components that convert signals to lower speeds (25 Gb/s), which then connect to the switch fabric. This segmentation allows high-speed transmission where needed while using lower-speed, lower-power connections elsewhere in the system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the transmission rate parameter along the signal path. Optical modules operate at 100 Gb/s, but the intermediate SERDES components operate at 25 Gb/s, creating a parameter transition that reduces power consumption in the switch fabric while maintaining high-speed optical transmission at the edges.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If signal line length is reduced, then signal distortion is minimized, but device complexity increases due to multiple SERDES converters

Engineering Contradiction:
Improvesignal distortionVSAvoidnumber of converters
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces intermediate SERDES components as mediators between optical modules and the switch fabric. These intermediates convert signals from 100 Gb/s to 25 Gb/s, enabling shorter signal lines to be used in the switch fabric while maintaining compatibility with high-speed optical modules. The intermediates absorb the complexity rather than requiring direct high-speed connections throughout.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If retimer functions are activated to correct waveform deterioration, then signal quality is improved, but power consumption increases

Engineering Contradiction:
Improvesignal qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent performs signal rate conversion at intermediate points before signals traverse long distances in the switch fabric. By converting 100 Gb/s signals to 25 Gb/s early in the transmission path, the system prevents waveform deterioration from occurring in the first place, eliminating the need for power-consuming retimer functions later in the signal path.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12244353B2Optical module switch device
Publication Date: 2025.03.04 1FINITY INC
  • US12244353B2 patent drawing
  • US12244353B2 patent drawing
  • US12244353B2 patent drawing

AI summary

An optical module switch device includes a first serial-parallel-converter coupled to first signal-lines coupled to optical modules, and second signal-lines, a number of the second signal-lines being greater than the first signal-lines thereof, and configured to transmit/receive first signals at a first transmission-rate to/from the optical modules by using the first signal-lines, respectively, a second serial-parallel-converter coupled to second signal-lines coupled to the first serial-parallel-converter, and third signal-lines, a number of the third lines being greater than the second signal-lines thereof, and configured to transmit/receive second signals at a second transmission-rate lower than the first transmission-rate to/from the first serial-parallel-converter by using the second signal-lines, respectively, and a switch circuit coupled to the third signal-lines, and configured to transmit/receive third signals at a third transmission-rate lower than the second transmission-rate to/from the second serial-parallel-converter by using the third signal-lines, respectively, to perform routing processing based on the received third signals.