Through-Wafer Optical Vias for Bulk Silicon Photonic Integration

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Solution Overview

Problem

Silicon photonic devices built on silicon-on-insulator (SOI) substrates are costly due to the complexity of creating waveguide bottom cladding layers on bulk silicon, which lacks a buried oxide layer.

Innovation Solution

A through-wafer optical via structure with deep-shallow trench isolation and SiGe seal is used on a bulk Si substrate, providing bottom and side waveguide cladding, respectively, to reduce costs and minimize optical losses, while integrating CMOS devices with photonic components on a single substrate without the need for bonding or additional wafers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon photonic devices are built on silicon-on-insulator (SOI) substrates, then optical performance is improved, but manufacturing cost increases

Engineering Contradiction:
Improveoptical performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent segments the waveguide structure into multiple functional layers: top cladding, core, and bottom cladding, each serving specific optical functions. This segmentation allows the device to achieve SOI-level optical performance while using a simpler bulk silicon substrate, thereby reducing manufacturing costs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating a bottom cladding layer with specific refractive index properties only where needed at the waveguide-bulk silicon interface. This localized optimization provides the necessary optical confinement and performance without requiring the complex SOI substrate structure throughout the entire device, thus lowering manufacturing costs.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If waveguide bottom cladding layers are created on bulk silicon, then manufacturing cost is reduced, but device complexity increases

Engineering Contradiction:
Improvemanufacturing costVSAvoiddevice complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the bottom cladding formation process with the existing waveguide fabrication steps. The bottom cladding is formed as an integrated part of the waveguide structure using the same deposition and patterning processes, eliminating the need for separate complex processing steps and reducing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bottom cladding layer serves multiple functions: it provides optical confinement, acts as a structural support layer, and enables heterogeneous integration with other photonic components. This multi-functionality reduces the need for additional separate layers or structures, thereby simplifying the overall device architecture while maintaining cost effectiveness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If through-wafer optical vias are formed, then heterogeneous integration is enabled, but manufacturing precision requirements increase

Engineering Contradiction:
Improveheterogeneous integration capabilityVSAvoidvia formation precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary action by forming the through-wafer optical vias at an early stage in the fabrication process, before final device assembly. This allows for easier alignment and integration with other components, as the vias are already in place to guide subsequent bonding and stacking operations, thereby reducing the precision requirements for later steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The through-wafer optical vias act as intermediaries that facilitate heterogeneous integration by providing aligned pathways for optical and electrical connections between different device layers. These vias serve as reference structures that simplify the alignment process during bonding, reducing the overall manufacturing precision requirements for integrating diverse photonic components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10770374B2Through-silicon vias for heterogeneous integration of semiconductor device structures
Publication Date: 2020.09.08 GLOBALFOUNDRIES US INC
  • US10770374B2 patent drawing
  • US10770374B2 patent drawing
  • US10770374B2 patent drawing

AI summary

The present disclosure relates to semiconductor structures and, more particularly, to through-silicon vias (TSV) for heterogeneous integration of semiconductor device structures and methods of manufacture. The structure includes: a plurality of cavity structures provided in a single substrate; at least one optical device provided on two sides of the single substrate and between the plurality of cavity structures; and a through wafer optical via extending through the substrate, between the plurality of cavity structures and which exposes a backside of the at least one optical device.