Optical Waveguide Chip Connection via V-Groove Passive Alignment

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Solution Overview

Problem

Current methods for connecting optical waveguide chips require complex active alignment processes, leading to high costs and inefficiencies due to the need for precise submicron alignment and adhesive fixation, which limits the ease and accuracy of end face connections.

Innovation Solution

A connection structure featuring a base substrate with grooves and spacer members that allow for passive alignment of optical waveguide chips, enabling accurate end face connection without adhesives, allowing for pluggable optical connections and reducing mounting restrictions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If active alignment mounting is used to connect optical waveguide chips, then connection accuracy can be achieved, but the alignment process becomes complex and time-consuming requiring alignment on 36 axes

Engineering Contradiction:
Improvealignment accuracyVSAvoidalignment process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

V-grooves are introduced as intermediary structures on the substrate to mechanically hold and pre-align the optical waveguide chips. The V-grooves act as a mediator that automatically positions the chips in the correct orientation and location, eliminating the need for complex 36-axis active alignment while maintaining submicron connection accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If active alignment mounting with adhesive fixation is used, then reliable connection can be achieved, but the mounting process becomes cumbersome and restrictive

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmounting ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The V-grooves serve as a mechanical intermediary that provides both positioning and securing functions. The groove geometry naturally holds the chips in place through mechanical interference, replacing the need for adhesives while maintaining connection reliability. This simplifies the manufacturing process by eliminating the adhesive application and curing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If precise submicron alignment is required for optical waveguide chip connection, then optical loss can be minimized, but the alignment time and process complexity increase significantly

Engineering Contradiction:
Improveoptical lossVSAvoidalignment time
Core Design Contradiction:
Loss of energyVSLoss of time

Solution Approach 1:

The V-grooves are pre-formed on the substrate before chip mounting, creating predetermined positioning features that automatically guide the chips into their correct positions. This preliminary preparation of alignment features eliminates the need for time-consuming real-time alignment adjustments, reducing alignment time while maintaining submicron precision and minimizing optical loss.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11493705B2Connection structure of optical waveguide chips
Publication Date: 2022.11.08 NIPPON TELEGRAPH & TELEPHONE CORP
  • US11493705B2 patent drawing
  • US11493705B2 patent drawing
  • US11493705B2 patent drawing

AI summary

A connection structure of optical waveguide chips includes a base substrate (2003) in which grooves (2013) are formed, spacer optical fibers (2006) each disposed for a corresponding one of the grooves (2013) and fitted in the groove (2013) while partially projecting from the base substrate (2003), and silica-based PLCs (2001, 2002) that are a plurality of optical waveguide chips in each of which grooves (2007) fitted on the projecting portions of the spacer optical fibers (2006) are formed at positions of an optical waveguide layer (2008) facing the grooves (2013), and each of which is mounted on the base substrate (2003) while being supported by the spacer optical fibers (2006). The silica-based PLCs (2001, 2002) are mounted on the base substrate (2003) such that incident/exit end faces of the optical waveguide layers (2008) face each other.