Optimized Read Voltage Computation for Memory Cell Calibration
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Solution Overview
Problem
Conventional memory systems face inefficiencies in recalibrating read voltages for memory cells due to shifts caused by charge loss and temperature variations, leading to high bit error rates and prolonged data retrieval latency through blind searching and multiple retry operations.
Innovation Solution
A method to compute an optimized read voltage based on signal and noise characteristics of memory cells, using a calibration circuit to measure bit counts at different test voltages and identify the voltage where count differences are minimized, allowing for efficient calibration and reduced latency in data retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional blind searching and multiple retry operations are used to recalibrate read voltages, then read voltage calibration can be performed, but data retrieval latency increases and bit error rates increase
Solution Approach 1:
The system performs preliminary measurement of signal and noise characteristics before actual data retrieval operations. By measuring bit counts at different test voltages and calculating optimized read voltages in advance, the system avoids the need for blind searching and multiple retry operations during actual data retrieval, thereby reducing latency while maintaining reliability
Solution Approach 2:
The system implements a feedback mechanism where measurement results from signal and noise characteristics are used to dynamically adjust and optimize read voltages. The calibration circuit measures bit counts at various test voltages, and these measurements feed back into the optimization algorithm to determine the optimal read voltage, creating a closed-loop system that adapts to changing conditions
2Measurement precision
If multiple test voltages are measured to compute optimized read voltage, then calibration accuracy improves, but measurement time increases
Solution Approach 1:
The system measures signal and noise characteristics at multiple test voltages to ensure calibration accuracy, but only performs these measurements when necessary (e.g., when voltage shifts are detected). This partial action approach balances the need for precision with the constraint of measurement time, avoiding unnecessary full recalibrations
Solution Approach 2:
The system changes measurement parameters dynamically by selecting specific test voltages based on detected conditions. When voltage shifts are detected, the system adjusts which test voltages are measured and how many measurements are performed, optimizing the balance between calibration accuracy and measurement time based on actual system state
Data Source
AI summary
A memory device to determine a voltage optimized to read a group of memory cells by reading the group of memory cells at a plurality of test voltages, computing bit counts at the test voltages respectively, and computing count differences in the bit counts for pairs of adjacent voltages in the test voltages. When a smallest one in the count differences is found at a side of a distribution of the count differences according to voltage, the memory device is configured to determine a location of an optimized read voltage, based on a ratio between a first count difference and a second count difference, where the first count difference is the smallest in the count differences, and the second count difference is closest in voltage to the first count difference.