Optional Logging in Real Time Instruction Tracing Logs

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Solution Overview

Problem

Conventional Real Time Instruction Tracing (RTIT) mechanisms lack the ability to selectively hide or show debug operations within the tracing log, leading to interference with the tracing mechanism itself and inaccurate IPC calculations due to extra instructions executed during debugging.

Innovation Solution

Implementing an optional logging system that allows for an invisible trace mode, where debug operations can be programmatically hidden from the tracing log, enabling the processor to operate as if extra instructions were not executed, and providing a mechanism to selectively enable or disable tracing of specific modes or regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If probe mode is entered to provide additional logging information, then debugging capability is improved, but the RTIT trace accuracy deteriorates due to extra instructions interfering with the trace

Engineering Contradiction:
Improvedebugging capabilityVSAvoidRTIT trace accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent segments the tracing system into two distinct modes: visible trace mode and invisible trace mode. The mode generation logic divides the tracing behavior based on the current execution mode, allowing probe mode operations to be isolated from the RTIT trace log. This segmentation enables debug operations to occur without contaminating the performance measurement data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by making the trace visibility property dependent on the execution context. Different regions of execution (probe mode vs. normal mode) have different trace visibility qualities. The packet generation logic adjusts the visibility property locally based on whether the current instruction belongs to probe mode or application code, ensuring that only relevant instructions appear in the trace log.

Inventive Principle:
Principle #3Local quality

2Loss of information

If all debug instructions are logged in the RTIT log, then complete debugging information is obtained, but IPC calculations become inaccurate due to extra instructions

Engineering Contradiction:
Improvedebugging information completenessVSAvoidIPC calculation accuracy
Core Design Contradiction:
Loss of informationVSMeasurement precision

Solution Approach 1:

The patent extracts probe mode instructions from the RTIT trace log by suppressing packet generation during probe mode execution. The mode generation logic identifies when the processor is in probe mode and prevents trace packets from being generated for those instructions. This extraction removes the harmful element (extra debug instructions) from the measurement data while preserving the ability to debug through separate mechanisms.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of information

If the RTIT log records all execution including probe mode, then transparency of debug operations is achieved, but the ability to debug RTIT mechanism itself is reduced

Engineering Contradiction:
Improvedebug operation transparencyVSAvoidRTIT mechanism debuggability
Core Design Contradiction:
Loss of informationVSEase of operation

Solution Approach 1:

The patent inverts the conventional approach by making probe mode operations invisible rather than visible in the RTIT trace. Instead of logging all debug operations, the system deliberately hides them. This inversion allows the RTIT mechanism to be debugged by creating a clean trace log that shows only application behavior, enabling hardware debuggers to verify that the tracing mechanism does not interfere with normal execution.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS9003375B2Optional logging of debug activities in a real time instruction tracing log
Publication Date: 2015.04.07 INTEL CORP
  • US9003375B2 patent drawing
  • US9003375B2 patent drawing
  • US9003375B2 patent drawing

AI summary

In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing optional logging of debug activities in a real time instruction tracing log. For example, in one embodiment, such means may include an integrated circuit having means for initiating instruction tracing for instructions of a traced application, mode, or code region, as the instructions are executed by the integrated circuit; means for generating a plurality of packets to a debug log describing the instruction tracing; means for initiating an alternative mode of execution within the integrated circuit; and means for suppressing indication of entering the alternative mode of execution. Additional and alternative means may be implemented for selectively causing an integrated circuit to operate in accordance with an invisible trace mode or a visible trace mode upon transition to the alternative mode of execution.