Optocoupler Terminal Layout for Shorter Interconnects and Stronger Bonding
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Solution Overview
Problem
In semiconductor devices with glass epoxy substrates, the length of intermediate interconnects between semiconductor chips and terminals is too long, leading to increased parasitic inductance, which hinders high-speed operation and can result in insufficient ultrasonic bonding strength due to absorption of ultrasonic waves by the resin layer.
Innovation Solution
The semiconductor device design includes a configuration where the input-side and output-side terminals overlap the light-receiving element, allowing efficient transmission of ultrasonic waves and reducing interconnect length through via contacts extending through a thin resin layer, thereby enhancing bonding strength and high-speed operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If intermediate interconnects are provided inside the glass epoxy substrate to connect semiconductor chip and terminals, then electrical connection is achieved, but the interconnect length becomes too long causing increased parasitic inductance
Solution Approach 1:
The patent changes the spatial arrangement by having terminals overlap the light-receiving element in the plan view, allowing via contacts to extend vertically through the resin layer. This dimensional reconfiguration shortens the interconnect path from a long horizontal route through the substrate to a short vertical path through the resin layer, reducing parasitic inductance while maintaining electrical connection reliability.
2Reliability
If resin layer is used to seal light-emitting element, light-receiving element and switching element, then device protection is achieved, but ultrasonic waves are absorbed reducing bonding strength
Solution Approach 1:
The patent extracts the ultrasonic bonding process from the bulk resin layer by positioning via contacts to extend through the resin layer. This allows ultrasonic waves to be applied at the terminal locations where the resin layer is thinner or absent, enabling effective bonding while maintaining the resin layer's protective sealing function over the light-emitting and light-receiving elements.
3Ease of manufacture
If terminals are positioned at back surface of glass epoxy substrate, then standard packaging is achieved, but intermediate interconnects become excessively long
Solution Approach 1:
The patent maintains terminals at the back surface of the glass epoxy substrate for standard packaging compatibility but introduces a vertical dimension through via contacts that extend through the resin layer. This creates a three-dimensional interconnect structure where the electrical path goes vertically through the resin layer rather than horizontally through the substrate, dramatically shortening the interconnect length while preserving the standard packaging arrangement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces parasitic inductance, improves the reliability of semiconductor devices by increasing bonding strength and enabling high-speed operation by efficiently transmitting ultrasonic waves and shortening electrical connections within the resin layer.
Implementation Method 1
efficient transmission of ultrasonic waves and reducing interconnect length through via contacts extending through a thin resin layer, thereby enhancing bonding strength
Data Source
AI summary
A semiconductor device includes a light-emitting element, a light-receiving element, a switching element, an input-side terminal, an output-side terminal, and a resin layer. The light-emitting element, the light-receiving element and the switching element are provided at the front side of the resin layer. The light-receiving element and the switching element are arranged in a first direction along the front side of the resin layer. The switching element is electrically connected to the light-receiving element. The light-receiving element is provided between the light-emitting element and the resin layer. The input-side and output-side terminals are provided at the backside of the resin layer. The input-side terminal is electrically connected to the light-emitting element. The output-side terminal is electrically connected to the switching element. At least one of the input-side or output-side terminals includes a portion overlapping the light-emitting element in a second direction from the resin layer to the light-emitting element.


