Optoelectronic Array Fabrication via Template-Guided Epitaxy
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Solution Overview
Problem
Current methods for growing III-V compound semiconductors on Silicon substrates are hindered by crystal defects, limiting the ability to detect longer wavelengths such as infrared, and existing solutions involving III-V bonded on Si-CMOS readout chips are expensive and not suitable for volume manufacturing.
Innovation Solution
A method of fabricating optoelectronic structures by growing first and second compound semiconductor layers on a crystalline substrate with a template structure, where the layers coalesce to form a coalescent film, and excess portions are removed to create an array of optoelectronic structures with reduced defective regions, allowing for efficient photo-current detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If III-V compound semiconductor material is directly grown on Si substrate, then manufacturing cost is reduced and volume manufacturing becomes possible, but crystal defects are generated that substantially limit photo-current detection
Solution Approach 1:
The substrate surface is segmented into a template structure with periodic cells containing openings. III-V material is grown selectively within these openings rather than across the entire substrate surface. This segmentation confines the material growth to isolated regions, preventing the formation of extensive crystal defects while maintaining compatibility with Si substrate manufacturing processes.
Solution Approach 2:
The template structure creates local regions (openings) where III-V material can grow with high crystalline quality, while the surrounding substrate areas maintain their Si crystal structure. This local quality approach allows III-V material to be grown only where needed, with controlled interfaces that minimize defect propagation, thereby preserving photo-current detection capability while enabling cost-effective manufacturing.
2Adaptability or versatility
If III-V compound semiconductor material is bonded on Si-CMOS readout chip, then long wavelength detection capability is achieved, but manufacturing cost increases and volume manufacturing is precluded
Solution Approach 1:
The invention merges the advantages of III-V material (long wavelength detection) with Si substrate benefits (cost-effectiveness, compatibility with CMOS manufacturing). By growing III-V material directly on patterned Si substrate using the template approach, the method combines the optical capabilities of III-V with the manufacturing advantages of Si, eliminating the need for expensive bonding processes while maintaining volume manufacturing capability.
3Reliability
If template structure with cells is used to grow first layer portions, then crystal defects are reduced, but fabrication process complexity increases
Solution Approach 1:
The template structure is prepared in advance on the Si substrate before III-V material growth. This preliminary action creates pre-defined openings that guide subsequent material deposition, ensuring that III-V material grows only in desired locations with proper crystalline orientation. This pre-prepared template simplifies the overall process by eliminating the need for complex post-growth patterning steps.
Solution Approach 2:
The template structure acts as an intermediary between the Si substrate and the III-V material. It provides a controlled interface that mediates the growth process, allowing III-V material to nucleate and grow with reduced defects while maintaining compatibility with the underlying Si substrate. This intermediary structure simplifies the interface management compared to direct growth approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of optoelectronic structures with low defect density, facilitating effective photo-current detection and potentially enabling infrared detection without the high costs associated with existing solutions.
Implementation Method 1
several first layer portions of a first compound semiconductor material are grown from seeds in each opening of the cells, so as for each of said first layer portions to a least partly fill a respective one of the cells and form an essentially planar film portion therein
Implementation Method 2
several second layer portions of a second compound semiconductor material are grown over said first layer portions, so as for neighboring ones of said second layer portions to coalesce and thereby form a coalescent film extending over said first layer portions
Data Source
AI summary
A method of fabrication of an array of optoelectronic structures. The method first provides a crystalline substrate having cells corresponding to individual optoelectronic structures to be obtained. Each of the cells comprises an opening to the substrate. Then, several first layer portions of a first compound semiconductor material are grown in each the opening to at least partly fill a respective one of the cells and form an essentially planar film portion therein. Next, several second layer portions of a second compound semiconductor material are grown over the first layer portionsthat coalesce to form a coalescent film extending over the first layer portions. Finally, excess portions of materials are removed, to obtain the array of optoelectronic structures. Each optoelectronic structure comprises a stack protruding from the substrate of: a residual portion of one of the second layer portions; and a residual portion of one of the first layer portions.