Optoelectronic Semiconductor Chip Production via Single-Mask Structuring
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Solution Overview
Problem
Current methods for producing optoelectronic semiconductor chips are costly and complex, lacking efficiency in production processes.
Innovation Solution
A method involving the formation of n- and p-conducting layers with a nitride semiconductor material, a metal layer sequence including a mirror and barrier layer, and a passivation layer using ALD, which reduces production costs and effort by eliminating the need for additional masks and photo techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional production methods are used for optoelectronic semiconductor chips, then manufacturing precision and reliability are maintained, but production costs increase and productivity decreases
Solution Approach 1:
The patent combines the structuring of the metal layer sequence and the p-conducting layer into a single photolithography step using one mask. This merging of two separate structuring operations into one simultaneous process reduces the number of production steps, eliminates the need for additional masks and photo techniques, thereby reducing production costs while maintaining manufacturing precision and reliability.
2Manufacturing precision
If multiple masks and photo techniques are used for structuring metal layers and semiconductor layers, then manufacturing precision is maintained, but device complexity and production effort increase
Solution Approach 1:
The patent merges the structuring operations for the metal layer sequence and the p-conducting layer into a single photolithography process. By using one mask to define both structures simultaneously, the patent eliminates the need for separate masking and patterning steps, thereby reducing production process complexity while maintaining the required manufacturing precision for both layers.
3Ease of manufacture
If additional masks and photo techniques are eliminated to reduce production costs, then ease of manufacture improves, but manufacturing precision may deteriorate
Solution Approach 1:
The patent combines the structuring of the metal layer sequence and the p-conducting layer into a single photolithography step using one mask. This merging approach maintains manufacturing precision because both structures are defined in the same exposure and development process, eliminating alignment errors that would arise from multiple sequential steps. The single mask simultaneously patterns both layers with the required accuracy while simplifying the overall production process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables cost-effective production of optoelectronic semiconductor chips with enhanced mechanical and chemical stability, simplified production processes, and efficient electromagnetic radiation emission.
Implementation Method 1
the passivation layer is produced by means of an ALD (Atomic Layer Deposition) process
Implementation Method 2
The sequence of metal layers is structured wet-chemically or by back-sputtering
Implementation Method 3
The n-conducting layer can be deposited epitaxially, for example, on a growth substrate
Data Source
Figure 1A~1C
Figure 1D~1E
Figure 1F~1G
AI summary
The invention relates to a method for producing an organic opto-electronic semiconductor chip, comprising the following steps: - providing an n-conducting layer (2), - arranging a p-conducting layer (4) on the n-conducting layer (2), - arranging a metal layer sequence (5) on the p-conducting layer (4), - arranging a mask (6) on the side of the metal layer sequence (5) which faces away from the p-conducting layer (4), - spot-ablating the metal layer sequence (5) and exposing the p-conducting layer (4) using the mask (6), and - spot-neutralizing or removing the exposed regions (4a) of the p-conducting layer (4) up to the n-conducting layer (2) using the mask (6), wherein - the metal layer sequence (5) comprises at least one mirror layer (51) and a barrier layer (52), and - the mirror layer (52) of the metal layer sequence (5) faces the p-conducting layer (4).