Optoelectronic Component Metallization via Directional Deposition

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Solution Overview

Problem

The existing methods for producing optoelectronic components require a large number of lithographic steps, which can be complex and inefficient, especially when dealing with III-V compound semiconductor materials.

Innovation Solution

A method that reduces the number of lithographic steps by using directional and non-directional deposition techniques for metallization and passivation, along with strategic mask structures and erosion processes, allowing for precise formation of recesses and contact structures without the need for additional masking steps, and utilizing dielectric materials for passivation and insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional lithographic methods are used for producing optoelectronic components, then precise patterning can be achieved, but the number of lithographic steps increases significantly

Engineering Contradiction:
Improvepatterning precisionVSAvoidproduction efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent extracts the masking function from traditional lithographic processes and implements it through physical mask structures deposited directly on the semiconductor regions. This eliminates the need for multiple lithographic steps while maintaining precise patterning, as the mask structures are formed through selective deposition rather than repeated lithography

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary deposition of mask structures on the semiconductor regions before subsequent processing steps. These pre-formed mask structures guide the directional deposition of metallization layers, eliminating the need for intermediate lithographic steps and reducing the overall number of processing steps

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple lithographic steps are used for forming contacts and reflective surfaces, then precise positioning can be achieved, but the production process becomes complex

Engineering Contradiction:
Improvepositioning accuracyVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple lithographic steps into a single process sequence. By using directionally deposited metallization layers that are guided by pre-formed mask structures, the patent combines patterning, positioning, and material deposition into one integrated process, reducing both complexity and the number of steps required

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces directionally deposited metallization layers as intermediary structures that serve multiple functions: they act as electrical contacts, reflective surfaces, and process guides for subsequent steps. These intermediary layers eliminate the need for separate lithographic steps for each function, simplifying the overall process

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If conventional deposition methods are used for metallization, then complete coverage can be achieved, but the available area for contacts is reduced

Engineering Contradiction:
Improvecontact area utilizationVSAvoiddeposition control
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies local quality by using directionally deposited metallization layers that are confined to specific regions defined by the mask structures. This ensures complete coverage only where needed for electrical contacts and reflective surfaces, while leaving other areas free for additional contacts or optical features, thereby maximizing the utilization of the semiconductor surface

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the production process, reduces tolerances in layer formation, and effectively utilizes the available area for contacts and reflective surfaces, while minimizing the need for lithographic processes, thereby enhancing the accuracy and efficiency of optoelectronic component manufacturing.

Implementation Method 1

By means of, e.g., a PVD method, the metallization is advantageously deposited over the entire top side of the p-type semiconductor region and of the mask structures, advantageously by means of evaporation

Methodology Applied
Scientific EffectEvaporation: Evaporation

Implementation Method 2

By means of, e.g., a PVD method, the metallization is advantageously deposited

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 3

Suitable non-directional methods are, e.g., sputtering or evaporation using a scattering gas or CVD

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 4

Suitable non-directional methods are, e.g., sputtering or evaporation using a scattering gas or CVD

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 5

The p-type and an n-type semiconductor region can be grown epitaxially on a carrier, for example

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS10263155B2Method for producing an optoelectronic component
Publication Date: 2019.04.16 OSRAM OLED
  • US10263155B2 patent drawing
  • US10263155B2 patent drawing
  • US10263155B2 patent drawing

AI summary

A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.