Optoelectronic Module Manufacturing Logic Chip Segmentation
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Solution Overview
Problem
There is a need for optoelectronic modules with a high surface density of individually-addressable emitter regions, which existing technologies have not effectively addressed.
Innovation Solution
A method involving a metal carrier composite with applied logic chips and individually controllable light-emitting diode chips, covered with a protective material and molded to form a cast body, allowing for electrical conductor paths to be applied and the modules to be severed, where the carrier units have no electrical function, enabling exclusive electrical control of emitter regions by the logic chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple emitter regions are integrated on a single chip to increase surface density, then the number of individually-addressable emitter regions increases, but the complexity of electrical control and routing increases significantly
Solution Approach 1:
The patent divides the emitter regions into groups, with each group controlled by a separate logic chip. This segmentation allows multiple emitter regions to be individually addressable while distributing the control complexity across multiple simpler logic units rather than requiring one complex control system for all emitters
Solution Approach 2:
The patent introduces logic chips as intermediary components between the carrier and emitter regions. Each logic chip receives control signals and translates them into appropriate electrical signals for its associated emitter regions, simplifying the overall control architecture by adding an intermediate control layer
2Ease of operation
If carrier units are made electrically functional to control emitter regions, then electrical control capability is provided, but the manufacturing complexity and electrical interference increase
Solution Approach 1:
The patent extracts the electrical control function from the carrier units and places it in separate logic chips. The carrier units are designed to be electrically inactive, focusing solely on mechanical support and heat dissipation, while the logic chips handle all electrical control functions, thereby reducing electrical interference and simplifying carrier manufacturing
Solution Approach 2:
The patent separates the electrical control dimension from the mechanical support dimension by placing logic chips in a separate layer above the carrier units. This dimensional separation allows the carrier to be optimized for mechanical properties while logic chips handle electrical functions, reducing cross-interference between functions
3Reliability
If protective material is applied over emitter regions and logic chips, then protection is provided, but subsequent electrical conductor application becomes more complex
Solution Approach 1:
The patent applies protective material as a preliminary step before molding, creating a protected surface that facilitates subsequent conductor application. The protective material serves as a foundation layer that enables easier conductor deposition while maintaining component protection throughout the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the production of highly compact optoelectronic modules with integrated CMOS-ICs and individually addressable emitter regions, suitable for applications like adaptive headlamps, with the logic chips controlling the emitter regions and assuming additional functions.
Implementation Method 1
applying a plurality of light-emitting diode chips including in each case multiple emitter regions individually electrically-controllable, which are based on a semiconductor material and configured to generate radiation
Data Source
AI summary
A method produces a plurality of optoelectronic modules, and includes: A) providing a metallic carrier assembly with a plurality of carrier units; B) applying a logic chip, each having at least one integrated circuit, to the carrier units; C) applying emitter regions that generate radiation, which can be individually electrically controlled; D) covering the emitter regions and the logic chips with a protective material; E) overmolding the emitter regions and the logic chips so that a cast body is formed, which joins the carrier units, the logic chips and the emitter regions to one another; F) removing the protective material and applying electrical conductor paths to the upper sides of the logic chips and to a cast body upper side; and G) dividing the carrier assembly into the modules.