Optoelectronic Package Blocking Structure for Clean Optical Integration

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Solution Overview

Problem

Chip-on-chip (CoC) packages face signal integrity issues due to high resistance and long transmission paths in wire bonding, limiting high-speed data rates, and there is a need to protect photonic components from contamination or damage during integration with additional optical devices.

Innovation Solution

An optoelectronic package structure with a photonic component featuring a blocking region between electrical connection regions to prevent filling material overflow, using blocking pads to isolate an optical device region and ensure precise filling material control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding is used to connect stacked electronic components, then electrical connection is achieved, but signal integrity deteriorates due to high resistance and long transmission path

Engineering Contradiction:
Improvesignal integrityVSAvoidtransmission path length
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from planar wire bonding to three-dimensional vertical interconnection through stacked packaging. By stacking photonic and electronic components vertically and using bump electrodes for direct electrical connection, the transmission path is shortened from extended wire bonds to direct through-silicon vias and bump contacts, improving signal integrity while reducing resistance and inductance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts and removes the wire bonding process from the stacked package structure. Instead of using wire bonds to connect components, the design directly connects photonic component electrode pads to electronic component bump electrodes through controlled dielectric layers and via structures, eliminating the harmful wire bond transmission path.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of energy

If photonic component is stacked with electronic component, then power loss is reduced, but photonic component is exposed to contamination or damage from filling material

Engineering Contradiction:
Improvepower lossVSAvoidcontamination and damage
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a protective dielectric layer as an intermediary barrier between the filling material and the photonic component. This dielectric layer covers the bonding pads and active regions of the photonic component, preventing filling material from directly contacting and potentially contaminating or damaging the photonic device during the encapsulation process.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies protective dielectric coating to the photonic component before the stacking and filling material encapsulation processes. This preliminary protective action ensures that when filling material is later introduced to secure the stacked structure, the photonic component surfaces are already protected from contamination and damage.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If additional optical devices are integrated with photonic component, then functionality is enhanced, but risk of contamination or damage increases

Engineering Contradiction:
Improveoptical device integrationVSAvoidcontamination and damage risk
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the device structure into distinct protected regions. The photonic component is covered with protective dielectric layers that create isolated zones, allowing additional optical devices to be integrated while the filling material is confined to specific encapsulation regions that do not contact the sensitive photonic or optical device surfaces.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12495655B2Optoelectronic package structure and method of manufacturing the same
Publication Date: 2025.12.09 ADVANCED SEMICON ENG INC
  • US12495655B2 patent drawing
  • US12495655B2 patent drawing
  • US12495655B2 patent drawing

AI summary

An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.