Optoelectronic Integrated Circuit Substrate With Tailored Dielectric Layers
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Solution Overview
Problem
Existing optoelectronic integrated circuit substrates face challenges in simultaneously implementing photonic, electronic, and MEMS structures due to differences in required dielectric layer thicknesses and the absence of a buried oxide layer in MEMS regions, which affects communication speed and device performance.
Innovation Solution
A method of fabricating an optoelectronic integrated circuit substrate by defining regions for photonic and electronic devices, forming trenches, filling them with dielectric materials, and bonding a second substrate to achieve varying thicknesses for optimal dielectric layers, while omitting dielectric layers in MEMS regions for easier structure formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a silicon on insulator (SOI) substrate is used to implement photonic and electronic devices together, then photonic device performance is improved, but the substrate cannot accommodate MEMS structures due to the presence of a buried oxide layer
Solution Approach 1:
The substrate is divided into distinct regions: a first substrate region with a buried oxide layer for photonic and electronic devices, and a second substrate region without a buried oxide layer for MEMS structures. This segmentation allows each region to have the optimal structure for its specific device type, resolving the contradiction between photonic device performance and MEMS structure compatibility.
Solution Approach 2:
Different portions of the substrate are given different structural qualities: the first substrate region has a buried oxide layer tailored for photonic devices, while the second substrate region lacks this layer to accommodate MEMS structures. This local differentiation enables the substrate to serve multiple device types with their respective structural requirements.
2Ease of manufacture
If dielectric layers are formed with uniform thickness across the substrate, then manufacturing is simplified, but device performance deteriorates due to inability to provide optimal thickness for different device regions
Solution Approach 1:
Dielectric layers are formed with different thicknesses in different regions: a first dielectric layer with first thickness in the first substrate region for photonic devices, and a second dielectric layer with second thickness in the second substrate region for MEMS structures. This local differentiation allows each device type to have optimal dielectric thickness while maintaining a unified manufacturing approach through selective formation processes.
3Speed
If optical communication is implemented between semiconductor integrated circuits, then communication speed is improved, but additional regions for optical fibers and MEMS structures are required, increasing substrate complexity
Solution Approach 1:
The patent combines multiple functional regions into a single integrated substrate: photonic device regions, electronic device regions, optical fiber placement regions, and MEMS structure regions are all merged into one substrate with differentiated local structures. This merging allows high-speed optical communication to be implemented while managing substrate complexity through unified design and fabrication processes.
Data Source
AI summary
A method of fabricating an optoelectronic integrated circuit substrate includes defining a photonic device region on a first substrate, the photonic device region having a photonic device formed thereon, forming a trench in the photonic device region on a top surface of the first substrate, the trench having a first depth, filling the trench with a dielectric, bonding a second substrate on the first substrate to cover the trench, and thinning the second substrate to a first thickness.