Optimization Processing Unit With Stochastic Computing And Programmable Interconnects

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Solution Overview

Problem

Standard computing architectures are limited in solving combinatorial optimization problems due to memory bandwidth bottlenecks and the high costs and complexity of quantum computing, necessitating an alternative approach for efficient problem-solving.

Innovation Solution

A system incorporating an optimization processing unit (OPU) with stochastic computing units and programmable interconnects, including FPGAs, that operates at room temperature and uses oscillators to provide probabilistic responses, allowing for parallel processing and reconfigurable connectivity to tackle complex optimization problems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If quantum computers are used to solve combinatorial optimization problems, then solution effectiveness is improved, but manufacturing difficulty and maintenance cost increase

Engineering Contradiction:

Improvesolution effectivenessVSAvoidmanufacturing difficulty

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces expensive, complex quantum computing hardware with a more accessible implementation using oscillators and stochastic computing units that can be manufactured at lower cost and maintained more easily, while still achieving effective solutions to combinatorial optimization problems

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent substitutes quantum mechanical systems with a hybrid system combining classical computing elements and oscillator-based stochastic computing, eliminating the need for complex quantum hardware while maintaining problem-solving capability

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Ease of manufacture

If standard computing methods are used to solve combinatorial optimization problems, then manufacturing and operational costs are reduced, but performance is limited by memory bandwidth bottleneck

Engineering Contradiction:

Improvemanufacturing costVSAvoidperformance

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The patent divides the computing system into separate functional units: classical computing components for control and stochastic computing units with oscillators for parallel probability calculations, allowing each segment to operate independently and avoid memory bandwidth bottlenecks

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential binary computing to parallel stochastic computing using oscillator probabilities, adding a dimensional aspect of probability and parallelism that bypasses traditional memory bandwidth limitations

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Productivity

If fully connected stochastic computing units are implemented, then processing capability is improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:

Improveprocessing capabilityVSAvoidconnectivity complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent implements reconfigurable interconnects using FPGAs that allow the connectivity between stochastic computing units to be dynamically adjusted and programmed, enabling flexible configuration of connection patterns without fixed complex wiring

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent uses universal programmable interconnect structures that can be configured to implement different connectivity patterns and logic functions, allowing the same hardware to serve multiple purposes and reducing overall system complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11604913B2Optimization processing unit having subunits that are programmably and partially connected

Publication Date: 2023.03.14 CAPITAL ONE SERVICES LLC

AI summary

Techniques usable in optimization processing are described. A system includes an optimization processing unit (OPU). The OPU includes stochastic computing units and at least one programmable interconnect. Each of the stochastic computing units includes nodes and multiplication unit(s) configured to interconnect at least a portion of the nodes. The programmable interconnect(s) are configured to provide weights for and to selectably couple a portion of the stochastic computing units.