ORAN RU Time Synchronization Using GNSS and FPGA Clock Correction

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Solution Overview

Problem

Conventional ORAN systems require expensive hardware and software compliance with IEEE 1588 standards for time synchronization, leading to high costs and constraints, particularly in small cell base stations.

Innovation Solution

Integrate a Global Navigation Satellite System (GNSS) module and a customized FPGA module into the RU, utilizing GPS signals for time synchronization, eliminating the need for a Telecom Grandmaster and reducing the necessity for IEEE 1588-compliant components, and employing a digital counter and clock generator to adjust the crystal oscillator frequency for precise timing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If IEEE 1588 standard compliance is implemented for time synchronization, then time synchronization accuracy is improved, but system cost and hardware complexity increase significantly

Engineering Contradiction:
Improvetime synchronization accuracyVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the time synchronization function from the complex IEEE 1588 compliance requirement and implements it independently using GNSS module and FPGA-based timestamp generation. This separates the synchronization function from the need for expensive T-GM hardware and IEEE 1588-compliant NICs, thereby reducing hardware complexity while maintaining synchronization accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces expensive, dedicated IEEE 1588 compliance hardware (T-GM, specialized NICs) with more economical components (standard NICs, FPGA module, GNSS module). This substitution achieves the same time synchronization function at lower cost and reduced hardware complexity.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If Telecom Grandmaster and IEEE 1588-compliant NIC are used for time synchronization, then time synchronization reliability is improved, but system cost increases

Engineering Contradiction:
Improvetime synchronization reliabilityVSAvoidsystem cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent substitutes expensive T-GM and IEEE 1588-compliant NICs with cost-effective alternatives: a standard NIC combined with an FPGA module that generates timestamps based on GNSS signals. This maintains synchronization reliability while dramatically reducing system cost.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The RU performs time synchronization autonomously using its own GNSS module and FPGA-based timestamp generation, eliminating the need for external T-GM hardware. This self-service approach reduces system cost while maintaining reliability.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If separate logical cores are allocated for timestamp reading and packet generation, then time synchronization precision is improved, but device complexity increases

Engineering Contradiction:
Improvetime synchronization precisionVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the timestamp reading and packet generation functions into a unified FPGA-based implementation. The FPGA module receives timestamps from the GNSS module and generates synchronized packets, eliminating the need for separate logical cores while maintaining synchronization precision through hardware-level coordination.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4671826A1ORAN system and method of time synchronization for RU and du in ORAN system
Publication Date: 2025.12.31 ALPHA NETWORKS INC
  • EP4671826A1 patent drawingFigure 1
  • EP4671826A1 patent drawingFigure 2
  • EP4671826A1 patent drawingFigure 3

AI summary

A RU (2) includes a crystal oscillator (24) set with a standard oscillation frequency, and a clock generator (25) using the frequency as a reference to define one second, generating clock pulse signals according to the frequency. A digital counter (233), upon receiving each clock pulse signal, adds one to a count value, and receives a PPS signal from a GNSS module every second. Upon receiving the PPS signal, the digital counter (233) reads the count value, determines whether the read count value is equal to a value of the frequency, and resets the count value to zero. If the read count value is not equal to the value of the frequency, the digital counter (233) sends an oscillation frequency adjustment signal to the crystal oscillator (24) for adjusting the crystal oscillator's oscillation frequency.