Ordered Data Sub-component Extraction Without Feedback Paths

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data processing technologies face challenges in quickly extracting and preserving the order of data sub-components within a data item, particularly in high-frequency data transmission contexts where the identification and handling of sub-components need to be performed rapidly.

Innovation Solution

An apparatus comprising reception circuitry, sub-component indicator extraction circuitry, adder circuitry, ordinal sub-component determination circuitry, and multiplexing circuitry that allows for the extraction and determination of valid data sub-component positions without positional feedback paths, enabling the unpacking of ordered data sub-components within one clock cycle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional data processing methods are used to extract and identify data sub-components, then the extraction can be performed with basic circuitry, but the processing speed is insufficient for high-frequency data transmission contexts

Engineering Contradiction:
Improveprocessing speedVSAvoidcircuitry complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The data item is segmented into multiple data sub-components at N respective positions, with each position having an associated validity indication. The extraction circuitry processes each position independently using parallel adders, allowing simultaneous identification of multiple sub-component positions without sequential dependency, thereby achieving high-speed extraction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Validity indications for all N positions are extracted and prepared in advance before the actual sub-component position identification. The adder circuitry pre-computes cumulative sums of validity indications, so when position determination is needed, the results are immediately available without additional computation delay.

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If feedback paths are used to determine ordinal positions of data sub-components, then accurate ordering can be achieved, but the timing is extended beyond one clock cycle

Engineering Contradiction:
Improveprocessing timeVSAvoidposition determination accuracy
Core Design Contradiction:
Loss of timeVSEase of operation

Solution Approach 1:

Instead of using feedback paths that require sequential processing, cumulative sum signals serve as intermediaries to directly indicate sub-component positions. The ordinal sub-component determination circuitry uses these cumulative sum transitions as mediators to identify positions without needing to wait for previous positions to be determined, enabling parallel position identification within one clock cycle.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The mechanical feedback-based sequential determination system is replaced with an electronic signal-based parallel determination system. Adder circuitry electronically computes position information simultaneously for all N positions, substituting the slow mechanical feedback loop with fast electronic parallel processing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If rapid extraction of data sub-components is implemented, then high-frequency processing is enabled, but the device complexity increases

Engineering Contradiction:
Improvedata processing throughputVSAvoidextraction circuitry complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The adder circuitry with N−1 adders serves multiple functions: it computes cumulative sums of validity indications, generates signals for determining all ordinal sub-component positions simultaneously, and provides timing synchronization for the multiplexing circuitry. This multi-functionality reduces the need for separate dedicated circuits for each task, balancing complexity with high processing throughput.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11681575B2Ordered data sub-component extraction
Publication Date: 2023.06.20 ARM LTD
  • US11681575B2 patent drawing
  • US11681575B2 patent drawing
  • US11681575B2 patent drawing

AI summary

Apparatuses and methods for extracting ordered data sub-components from a data item are disclosed. A received data item has a data structure to accommodate multiple data sub-components. The data item indicates which data sub-components are valid. Adders sum respective subsets of indications of the valid data sub-component positions, with each adder covering one more position than the previous adder. Transitions of the counts generated by the respective adders are used to determine the ordinal valid data sub-component positions in the data item, which can then be output on the basis of the data item and the identified transition positions. Without requiring feedback paths from an identified earlier ordinal position to identify a later ordinal position, the set of ordered data sub-components can be extracted more quickly.