Organic Interconnect Bridge Package for Low-Stress Chip Connections

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Solution Overview

Problem

Conventional semiconductor packages face challenges such as increased size, high manufacturing costs, complex Through Silicon Via (TSV) formation, reliability issues due to thermal expansion mismatch, and power integrity deterioration, especially with silicon-based interconnect bridges.

Innovation Solution

A semiconductor package with a novel structure featuring a circuit board embedded with a connection member, including insulating layers of organic materials like polyimide, and a bridge substrate with controlled thickness and alignment, minimizing signal transmission loss and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a silicon-based interconnect bridge is used, then connection reliability between chips is improved, but manufacturing cost increases and thermal expansion mismatch causes reliability issues

Engineering Contradiction:

Improveconnection reliabilityVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces expensive silicon-based interconnect bridges with organic material-based connection members that are cost-effective and suitable for mass production, achieving reliable connections without the high manufacturing costs associated with silicon TSV formation

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the material parameter from silicon to organic materials, which have matching thermal expansion coefficients with the substrate, thereby eliminating thermal expansion mismatch issues while maintaining connection reliability

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a silicon-based interconnect bridge is used, then connection reliability between chips is improved, but thermal expansion mismatch deteriorates reliability

Engineering Contradiction:

Improveconnection reliabilityVSAvoidthermal expansion mismatch

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter from silicon to organic materials with thermal expansion coefficients matching the substrate, thereby eliminating the harmful thermal expansion mismatch effect while maintaining connection reliability

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses organic materials for the connection member that have homogeneous thermal expansion properties with the organic substrate, preventing stress concentration and reliability degradation caused by thermal cycling

Inventive Principle:

Principle #33Homogeneity

3Productivity

If multiple chips are mounted on a limited-size substrate, then device performance is improved, but mounting area per chip is reduced

Engineering Contradiction:

Improvedevice performanceVSAvoidmounting area

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent embeds the connection member within the insulating layer structure, nesting multiple functional elements (connection members, insulating layers, cavities) in a compact three-dimensional arrangement that maximizes chip density on the substrate

Inventive Principle:

Principle #7Nested doll (Nesting)

4Reliability

If Through Silicon Via (TSV) formation is used, then chip connection is achieved, but manufacturing complexity increases

Engineering Contradiction:

Improvechip connectionVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the complex mechanical TSV formation process with a simpler organic material-based connection member embedding process, achieving reliable chip connections without the complicated silicon etching, filling, and planarization steps required for TSV

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The package reduces size, lowers manufacturing costs, enhances reliability by matching thermal expansion coefficients, and minimizes signal transmission loss, while allowing multiple processor and memory chips to be mounted side-by-side.

Implementation Method 1

there is a reliability issue due to a mismatch in coefficient of thermal expansion (CTE) between a silicon material of the bridge and an organic material of the substrate

Methodology Applied

Scientific EffectThermal expansion coefficient matching: Thermal Expansion

Data Source

PatentUS20250329657A1Semiconductor package

Publication Date: 2025.10.23 LG INNOTEK CO LTD

AI summary

A semiconductor package according to an embodiment includes circuit board; and a connection member embedded in the circuit board, wherein the circuit board includes a first insulating layer not having a reinforcing member, the connection member is embedded in the first insulating layer of the circuit board, and the connection member includes a second insulating layer including an organic material.