Organic EL Display Device Buffer Transistor Stress Reduction
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Solution Overview
Problem
Existing organic EL display devices face challenges in miniaturization due to stress applied to transistors, leading to increased frame size and degradation, despite external compensation methods for transistor and organic EL element deterioration.
Innovation Solution
A display device with a pixel circuit and driving method that includes a scanning signal line drive circuit with a shift register configuration, where the control signal line potential is switched between on and off states to reduce stress on buffer transistors, allowing for real-time monitoring and compensation, thereby reducing transistor size and frame size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external compensation method is used to compensate for transistor and organic EL element deterioration, then display quality is improved, but frame size increases due to stress applied to transistors
Solution Approach 1:
The control signal line potential is switched periodically between a first potential (during monitoring periods) and a second potential (during normal operation periods). This periodic switching allows the buffer transistor to be in an on-state only when needed for monitoring, reducing stress accumulation while maintaining compensation functionality.
Solution Approach 2:
The buffer transistor's state is made dynamic by switching the control signal line potential. Instead of maintaining a fixed on-state, the transistor dynamically transitions between on and off states based on whether monitoring is required, thereby reducing stress while preserving compensation capability.
2Extent of automation
If control signal line potential is maintained at first potential to keep buffer transistor in on state, then monitoring processing is enabled, but stress on buffer transistor increases
Solution Approach 1:
The control signal line potential is switched periodically between a first potential (during monitoring periods) and a second potential (during normal operation periods). This periodic switching allows the buffer transistor to be in an on-state only when needed for monitoring, reducing stress while maintaining compensation functionality.
Solution Approach 2:
Instead of maintaining the buffer transistor in a continuous on-state, the system applies the first potential only partially - specifically during monitoring periods when it is actually needed. This partial application of the on-state reduces unnecessary stress while preserving the essential monitoring capability.
3Reliability
If buffer transistor size is increased to reduce stress, then transistor reliability is improved, but frame size increases
Solution Approach 1:
The control signal line potential is switched periodically between a first potential (during monitoring periods) and a second potential (during normal operation periods). This periodic switching allows the buffer transistor to be in an on-state only when needed for monitoring, reducing stress while maintaining compensation functionality.
Solution Approach 2:
The system changes the operational parameters of the buffer transistor by switching the control signal line potential between different values. This parameter change allows the transistor to operate with reduced stress by being in the on-state only during monitoring periods rather than continuously, enabling smaller transistor dimensions while maintaining reliability.
Data Source
AI summary
To make a frame size of a display device having an external compensation function smaller than those of the known display devices.Each of a plurality of unit circuits configuring a gate driver includes a first output control transistor including a second conduction terminal connected to a first output terminal-connected to another unit circuit and a control terminal connected to a first internal node, a second output control transistor including a second conduction terminal connected to a second output terminal configured to output an on level signal for at least a part of a monitoring period and a control terminal connected to a second internal node, and an output circuit control transistor including a first conduction terminal connected to the first internal node and a second conduction terminal connected to the second internal node. A potential to be applied to a control terminal of the output circuit control transistor is switched between a potential of a high level and a potential of a low level.


