Organic Electroluminescent Pixel Circuit With Planar Capacitance

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Solution Overview

Problem

Existing organic electroluminescent devices face challenges in securing capacitance of capacitive elements without compromising high-density pixel arrangements, particularly when capacitive electrodes are formed on layers with scanning or gate electrodes, leading to difficulty in achieving desired capacitance and luminance stability.

Innovation Solution

The capacitive element is configured with electrodes on the same layer, separated by a dielectric film, allowing for capacitance without multilayer structures, and is positioned to surround the gate electrode, ensuring stable gate potential and reduced coupling, while utilizing power supply line layers for effective conduction with minimal resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If capacitive electrodes are formed on layers with scanning or gate electrodes to achieve high-density pixels, then pixel density is improved, but capacitance of capacitive elements deteriorates

Engineering Contradiction:
Improvepixel densityVSAvoidcapacitance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from vertical stacking (multilayer) to horizontal arrangement (planar) for capacitive electrodes. The first and second capacitive electrodes are arranged side-by-side on the same layer, separated by a partition, enabling capacitance accumulation in the planar direction rather than requiring multiple layers, thus resolving the contradiction between high pixel density and sufficient capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If capacitive electrodes are formed on the same layer to secure capacitance, then capacitance is improved, but device complexity increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidstructure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the capacitive electrode formation with the existing single-layer structure. The first and second capacitive electrodes, along with the partition, are integrated into one layer, merging the capacitance function with the existing electrode layer rather than adding separate layers, thus improving capacitance without significantly increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration secures capacitance, stabilizes gate potential, and reduces coupling, enabling high-density pixel arrangements without luminance variation, thus enhancing the performance and reliability of organic electroluminescent devices.

Implementation Method 1

a dielectric film provided between the first electrode and the second electrode

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Implementation Method 2

an organic electroluminescent element that emits light with a luminance corresponding to the magnitude of a current supplied via the first transistor

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS12406625B2Organic electroluminescent device and electronic apparatus
Publication Date: 2025.09.02 LUMITEK DISPLAY TECH LTD
  • US12406625B2 patent drawing
  • US12406625B2 patent drawing
  • US12406625B2 patent drawing

AI summary

An electroluminescent device includes a scanning line that extends in a first direction, a light emitting element, a driving transistor that supplies a driving current to the light emitting element, a first conductive layer that is supplied a fixed potential and extends in the first direction, a second conductive layer that is supplied the fixed potential and is disposed on a different layer than the first conductive layer, and a third conductive layer that is electrically connected to a first terminal of the driving transistor and to the light emitting element, and is disposed on a same layer as the second conductive layer. The third conductive layer is surrounded by the second conductive layer in plan view.