Organic Gate Insulating Layer for LCD Array Substrate
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Solution Overview
Problem
The high production cost and extended fabrication time of inorganic gate insulating layers in liquid crystal display devices due to the use of chemical vapor deposition (CVD) methods, which affect the mobility of charge carriers and the overall performance of thin film transistors (TFTs).
Innovation Solution
The use of a sol-gel type organic insulating material with a radical of carbon chain composition ratio between 8% to 11% by weight, formed by coating methods such as inkjet, nozzle coating, or spin coating, replacing the expensive CVD process, and incorporating metal oxides to enhance the dielectric constant of the gate insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inorganic insulating material is used for gate insulating layer and CVD method is applied, then interface property with semiconductor layer is improved and charge mobility is enhanced, but production cost increases and fabrication time is extended
Solution Approach 1:
The patent changes the material composition parameters of the gate insulating layer by incorporating organic insulating materials with specific carbon chain radical content (5-20 weight %) mixed with inorganic insulating materials. This compositional parameter change enables the layer to be formed by low-pressure CVD at lower temperatures and pressures, reducing fabrication time while maintaining interface quality and charge mobility through optimized material ratios
Solution Approach 2:
The patent creates a composite gate insulating layer combining inorganic insulating materials (silicon oxide, silicon nitride) with organic insulating materials (carbon chain radicals). This composite structure leverages the excellent interface properties of inorganic materials while incorporating the low-temperature deposition benefits of organic materials, achieving both high reliability and improved productivity through reduced fabrication time
2Reliability
If inorganic insulating material is used for gate insulating layer, then interface property with semiconductor layer is improved, but production cost increases due to expensive CVD apparatus
Solution Approach 1:
The patent modifies the gate insulating layer composition to include organic insulating materials with carbon chain radicals (5-20 weight %), which can be deposited using low-pressure CVD with simpler, less expensive apparatus. This parameter change in material composition allows the use of more cost-effective equipment while preserving the excellent interface properties needed for high charge mobility
Solution Approach 2:
The patent substitutes expensive inorganic insulating materials with a composite including cheaper organic insulating materials containing carbon chain radicals. This substitution reduces production costs by using more economical materials that can still provide the required interface quality when properly formulated within the specified composition range
3Productivity
If organic insulating material with carbon chain radical is used, then production cost is reduced and fabrication time is shortened, but dielectric constant decreases
Solution Approach 1:
The patent formulates a composite gate insulating layer where inorganic insulating materials (providing high dielectric constant) are combined with organic insulating materials containing carbon chain radicals (enabling fast fabrication). By optimizing the ratio within the specified range (5-20 weight % organic content), the composite achieves both rapid deposition and sufficient dielectric properties
Solution Approach 2:
The patent optimizes the compositional parameters of the gate insulating layer by precisely controlling the carbon chain radical content (5-20 weight %). This parameter optimization balances the trade-off between fabrication speed and dielectric constant, ensuring that the organic component accelerates production while the inorganic component maintains adequate dielectric performance
4Ease of manufacture
If organic insulating material is used to replace inorganic material, then CVD apparatus cost is reduced, but interface property with semiconductor layer may deteriorate
Solution Approach 1:
The patent creates a composite gate insulating layer that combines inorganic insulating materials (ensuring good interface properties) with organic insulating materials (reducing apparatus requirements). This composite approach maintains the interface quality needed for high charge mobility while allowing the use of more cost-effective deposition equipment
Solution Approach 2:
The patent adjusts the material composition parameters by incorporating organic insulating materials with specific carbon chain radical content (5-20 weight %) into the gate insulating layer. This parameter change enables the use of simplified CVD apparatus while preserving the interface properties necessary for reliable device operation through careful compositional control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs, improves process efficiency, and enhances the electrical properties of TFTs by minimizing carrier traps, achieving performance comparable to inorganic insulating materials while maintaining a lower dielectric constant.
Implementation Method 1
The use of a sol-gel type organic insulating material with a radical of carbon chain composition ratio between 8% to 11% by weight, formed by coating methods such as inkjet, nozzle coating, or spin coating
Implementation Method 2
enhances the electrical properties of TFTs by minimizing carrier traps, achieving performance comparable to inorganic insulating materials while maintaining a lower dielectric constant
Data Source
AI summary
An array substrate for a liquid crystal display device includes: a gate line and a gate electrode on a substrate, the gate electrode connected to the gate line; a gate insulating layer on the gate line and the gate electrode, the gate insulating layer including an organic insulating material such that a radical of carbon chain has a composition ratio of about 8% to about 11% by weight; a semiconductor layer on the gate insulating layer over the gate electrode; a data line crossing the gate line to define a pixel region; source and drain electrodes on the semiconductor layer, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode; a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer, the pixel electrode connected to the drain electrode through the drain contact hole.