Organic Interposer Structure for High-Density Chip Interconnection
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Solution Overview
Problem
Current semiconductor package technologies, such as 2D and 2.5D packages, face limitations in achieving high-density integration due to substrate processing capabilities and high costs associated with silicon interposers, which restrict the density and complexity of chip interconnections.
Innovation Solution
The development of an organic interposer structure manufacturing method using a bearing plate with a temporary bonding layer, photosensitive dielectric layers, and metallization to form conducting posts and circuit layers, followed by surface treatment, enabling the creation of a redistribution layer with high-resolution capabilities and low processing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If silicon interposers are used to achieve high-density integration, then chip interconnection density and complexity are improved, but processing difficulty and cost increase significantly
Solution Approach 1:
The patent replaces expensive silicon interposers with organic interposer materials that are cheaper and easier to process. The organic interposer achieves comparable interconnection density without the high processing difficulty and cost associated with silicon, effectively using a less durable but more manufacturable material to solve the contradiction.
Solution Approach 2:
The patent changes the material parameter from silicon to organic materials, fundamentally altering the processing characteristics. This material substitution enables high-density interconnections to be achieved through simpler, lower-cost manufacturing processes, resolving the contradiction between manufacturing precision and ease of manufacture.
2Manufacturing precision
If silicon interposers are used to achieve high-density integration, then chip interconnection density and complexity are improved, but cost increases significantly
Solution Approach 1:
The patent substitutes expensive silicon interposers with cost-effective organic interposer materials. This material replacement maintains the required interconnection density while dramatically reducing manufacturing costs, directly addressing the contradiction between manufacturing precision and cost.
Solution Approach 2:
The patent creates an organic interposer that copies the functional characteristics of silicon interposers (interconnection density, electrical properties) but uses fundamentally different, cheaper materials and processes, achieving the same technical outcome at lower cost.
3Ease of manufacture
If conventional substrate processing is used, then processing simplicity is maintained, but high-density integration capability is limited
Solution Approach 1:
The patent uses composite organic materials for the interposer structure, combining multiple dielectric and conductive layers to achieve high-density interconnections. This composite approach enables conventional processing methods to produce advanced high-density integration, resolving the contradiction between processing simplicity and integration density.
Solution Approach 2:
The patent employs multi-layer stacked distribution units in a three-dimensional configuration, enabling high-density integration through vertical stacking rather than horizontal expansion. This dimensional approach allows conventional processing to achieve advanced integration densities by utilizing the third dimension.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the production of high-density I/O chip flip packages with reduced processing difficulty and cost, achieving panel-level processing and 2.5D package capabilities while simplifying chip and substrate connections.
Implementation Method 1
forming a window on the photosensitive dielectric layer by means of exposure and development
Implementation Method 2
electroplating the circuit layer pattern to form the conducting post and the circuit layer
Data Source
AI summary
A manufacturing method for an organic interposer structure includes (a) providing a bearing plate, (b) applying a temporary bonding layer on the bearing plate, (c) applying a photosensitive dielectric layer on the temporary bonding layer, (d) forming a window on the photosensitive dielectric layer and performing metallization to form a circuit layer, (e) repeating the steps (c) and (d) on the circuit layer until the target number of layers is achieved, (f) de-bonding the temporary bonding layer and removing the bearing plate to expose the conducting post, (g) thinning the exposed conducting post to form a first pad, forming a solder mask layer on the surface of the outermost exposed circuit layer, wherein the solder mask layer exposes part of the circuit layer to form a second pad, and (h) performing a metal surface treatment on the first and second pads.