Organic Microelectronic Device Polarity Definition Layer

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Solution Overview

Problem

There is a need for organic electronic devices with higher integration and simplified fabrication processes that can offer improved performance, flexibility, and cost-effectiveness compared to traditional inorganic devices, particularly in applications like smart cards, RFID tags, and active matrix displays.

Innovation Solution

The development of organic electronic devices incorporating a bulk heterojunction active layer with distinct polarity regions, formed by a mixture of donor and acceptor materials, and a polarity definition layer with specific surface characteristics, enabling the creation of dual gate organic field effect transistors, ambipolar transistors, and solar cells through a solution process and annealing techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If organic electronic devices are fabricated using traditional inorganic device processes, then device performance and reliability are improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameters by using organic semiconductors instead of inorganic materials, and controls the molecular orientation parameters through solution processing and annealing conditions to achieve both performance and simplified manufacturing

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite organic semiconductor materials with specific molecular structures that combine electron-transport and hole-transport properties, enabling dual-polarity device operation with simplified fabrication processes

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If organic electronic devices are designed for higher integration, then device functionality and application range are improved, but fabrication process complexity increases

Engineering Contradiction:
Improvedevice integration capabilityVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal organic semiconductor layer that can function as both electron-transport and hole-transport channel depending on molecular orientation, enabling multiple device types (n-type, p-type, ambipolar) from a single fabrication process

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses solution processing parameters and annealing conditions to control molecular orientation, achieving different polarity regions without additional fabrication steps, thus enabling high integration with simplified processes

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If bulk heterojunction active layer is formed with controlled molecular orientation, then carrier mobility and polarity control are improved, but manufacturing process complexity increases

Engineering Contradiction:
Improvecarrier mobility controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent utilizes the phase transition during solvent evaporation and annealing to control molecular orientation in the bulk heterojunction active layer, achieving precise carrier mobility control through thermodynamic processes rather than complex mechanical alignment

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The patent controls molecular orientation parameters by adjusting solution processing conditions and annealing temperature, achieving precise carrier mobility control through parameter optimization rather than complex fabrication steps

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the fabrication of devices with enhanced carrier mobility and polarity control, enabling higher integration and flexibility in organic electronic devices, such as dual gate OFETs and solar cells, while simplifying the manufacturing process and reducing costs.

Implementation Method 1

A surface of the active region polarity definition layer may have a hydrophobic characteristic and the majority carriers in the lower region of the bulk heterojunction active layer may be p-type carriers

Methodology Applied
Scientific EffectHydrophobic characteristic: Hydrophobe

Implementation Method 2

The surface of the active region polarity definition layer may have a hydrophilic characteristic and the majority carriers in the lower region of the bulk heterojunction active layer may be n-type carriers

Methodology Applied
Scientific EffectHydrophilic characteristic: Hydrophile

Implementation Method 3

The bulk heterojunction active layer includes an upper region and a lower region having respective majority carriers localized therein of different polarities

Methodology Applied
Scientific EffectPhase separation:

Implementation Method 4

a first annealing process may be performed at a lower temperature than a lower of glass transition temperatures of each of the donor and the acceptor. After the performing the first annealing process, a second annealing process may be performed at a higher temperature

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS8552421B2Organic microelectronic device and fabrication method therefor
Publication Date: 2013.10.08 SAMSUNG ELECTRONICS CO LTD
  • US8552421B2 patent drawing
  • US8552421B2 patent drawing
  • US8552421B2 patent drawing

AI summary

An organic electronic device includes an active region polarity definition layer, and a bulk heterojunction active layer formed on the active region polarity definition layer. The bulk heterojunction active layer includes an upper region and a lower region having respective majority carriers localized therein of different polarities.